2 * Config file for Compulab CM-FX6 board
4 * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
6 * Author: Nikita Kiryanov <nikita@compulab.co.il>
8 * SPDX-License-Identifier: GPL-2.0+
11 #ifndef __CONFIG_CM_FX6_H
12 #define __CONFIG_CM_FX6_H
14 #include "mx6_common.h"
17 #define CONFIG_SYS_LITTLE_ENDIAN
18 #define CONFIG_MACH_TYPE 4273
21 #define CONFIG_CMD_GREPENV
22 #undef CONFIG_CMD_LOADB
23 #undef CONFIG_CMD_LOADS
24 #undef CONFIG_CMD_XIMG
25 #undef CONFIG_CMD_FPGA
28 #define CONFIG_SYS_FSL_USDHC_NUM 3
29 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
32 #define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR
33 #define PHYS_SDRAM_2 MMDC1_ARB_BASE_ADDR
34 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
35 #define CONFIG_NR_DRAM_BANKS 2
36 #define CONFIG_SYS_MEMTEST_START 0x10000000
37 #define CONFIG_SYS_MEMTEST_END 0x10010000
38 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
39 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
40 #define CONFIG_SYS_INIT_SP_OFFSET \
41 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
42 #define CONFIG_SYS_INIT_SP_ADDR \
43 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
46 #define CONFIG_MXC_UART
47 #define CONFIG_MXC_UART_BASE UART4_BASE
48 #define CONFIG_BAUDRATE 115200
49 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
52 #define CONFIG_SYS_PROMPT "CM-FX6 # "
53 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
54 sizeof(CONFIG_SYS_PROMPT) + 16)
58 #define CONFIG_SF_DEFAULT_BUS 0
59 #define CONFIG_SF_DEFAULT_CS 0
60 #define CONFIG_SF_DEFAULT_SPEED 25000000
61 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
64 #define CONFIG_ENV_IS_IN_SPI_FLASH
65 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
66 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
67 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
68 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
69 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
70 #define CONFIG_ENV_SIZE (8 * 1024)
71 #define CONFIG_ENV_OFFSET (768 * 1024)
73 #define CONFIG_EXTRA_ENV_SETTINGS \
74 "stdin=serial,usbkbd\0" \
75 "stdout=serial,vga\0" \
76 "stderr=serial,vga\0" \
79 "kernel=uImage-cm-fx6\0" \
82 "bootm_low=18000000\0" \
83 "loadaddr=0x10800000\0" \
84 "fdtaddr=0x11000000\0" \
85 "console=ttymxc3,115200\0" \
87 "video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \
88 "video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \
89 "doboot=bootm ${loadaddr}\0" \
91 "setboottypez=setenv kernel zImage-cm-fx6;" \
92 "setenv doboot bootz ${loadaddr} - ${fdtaddr};" \
93 "setenv doloadfdt true;\0" \
94 "setboottypem=setenv kernel uImage-cm-fx6;" \
95 "setenv doboot bootm ${loadaddr};" \
96 "setenv doloadfdt false;\0"\
97 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
98 "sataroot=/dev/sda2 rw rootwait\0" \
99 "nandroot=/dev/mtdblock4 rw\0" \
100 "nandrootfstype=ubifs\0" \
101 "mmcargs=setenv bootargs console=${console} root=${mmcroot} " \
103 "sataargs=setenv bootargs console=${console} root=${sataroot} " \
105 "nandargs=setenv bootargs console=${console} " \
106 "root=${nandroot} " \
107 "rootfstype=${nandrootfstype} " \
109 "nandboot=if run nandloadkernel; then " \
111 "run setboottypem;" \
112 "run storagebootcmd;" \
113 "run setboottypez;" \
114 "run storagebootcmd;" \
116 "run_eboot=echo Starting EBOOT ...; "\
118 "mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \
119 "loadscript=load ${storagetype} ${storagedev} ${loadaddr} ${script};\0"\
120 "loadkernel=load ${storagetype} ${storagedev} ${loadaddr} ${kernel};\0"\
121 "loadfdt=load ${storagetype} ${storagedev} ${fdtaddr} ${dtb};\0" \
122 "bootscript=echo Running bootscript from ${storagetype} ...;" \
123 "source ${loadaddr};\0" \
124 "nandloadkernel=nand read ${loadaddr} 0 780000;\0" \
125 "nandloadfdt=nand read ${fdtaddr} 780000 80000;\0" \
126 "setupmmcboot=setenv storagetype mmc; setenv storagedev 2;\0" \
127 "setupsataboot=setenv storagetype sata; setenv storagedev 0;\0" \
128 "setupnandboot=setenv storagetype nand;\0" \
129 "setupusbboot=setenv storagetype usb; setenv storagedev 0;\0" \
130 "storagebootcmd=echo Booting from ${storagetype} ...;" \
131 "run ${storagetype}args; run doboot;\0" \
132 "trybootk=if run loadkernel; then " \
133 "if ${doloadfdt}; then " \
136 "run storagebootcmd;" \
138 "trybootsmz=if run loadscript; then " \
141 "run setboottypem;" \
143 "run setboottypez;" \
146 #define CONFIG_BOOTCOMMAND \
147 "run setupmmcboot;" \
148 "mmc dev ${storagedev};" \
149 "if mmc rescan; then " \
152 "run setupusbboot;" \
153 "if usb start; then "\
154 "if run loadscript; then " \
158 "run setupsataboot;" \
159 "if sata init; then " \
162 "run setupnandboot;" \
165 #define CONFIG_PREBOOT "usb start"
169 #define CONFIG_MXC_SPI
170 #define CONFIG_SPI_FLASH
171 #define CONFIG_SPI_FLASH_ATMEL
172 #define CONFIG_SPI_FLASH_EON
173 #define CONFIG_SPI_FLASH_GIGADEVICE
174 #define CONFIG_SPI_FLASH_MACRONIX
175 #define CONFIG_SPI_FLASH_SPANSION
176 #define CONFIG_SPI_FLASH_STMICRO
177 #define CONFIG_SPI_FLASH_SST
178 #define CONFIG_SPI_FLASH_WINBOND
181 #ifndef CONFIG_SPL_BUILD
182 #define CONFIG_CMD_NAND
183 #define CONFIG_SYS_NAND_BASE 0x40000000
184 #define CONFIG_SYS_NAND_MAX_CHIPS 1
185 #define CONFIG_SYS_MAX_NAND_DEVICE 1
186 #define CONFIG_NAND_MXS
187 #define CONFIG_SYS_NAND_ONFI_DETECTION
188 /* APBH DMA is required for NAND support */
189 #define CONFIG_APBH_DMA
190 #define CONFIG_APBH_DMA_BURST
191 #define CONFIG_APBH_DMA_BURST8
195 #define CONFIG_FEC_MXC
196 #define CONFIG_FEC_MXC_PHYADDR 0
197 #define CONFIG_FEC_XCV_TYPE RGMII
198 #define IMX_FEC_BASE ENET_BASE_ADDR
199 #define CONFIG_PHYLIB
200 #define CONFIG_PHY_ATHEROS
202 #define CONFIG_ETHPRIME "FEC0"
203 #define CONFIG_ARP_TIMEOUT 200UL
204 #define CONFIG_NET_RETRY_COUNT 5
207 #define CONFIG_CMD_USB
208 #define CONFIG_USB_EHCI
209 #define CONFIG_USB_EHCI_MX6
210 #define CONFIG_USB_STORAGE
211 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
212 #define CONFIG_MXC_USB_FLAGS 0
213 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
214 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
215 #define CONFIG_USB_KEYBOARD
216 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
217 #define CONFIG_SYS_STDIO_DEREGISTER
220 #define CONFIG_CMD_I2C
221 #define CONFIG_SYS_I2C
222 #define CONFIG_SYS_I2C_MXC
223 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
224 #define CONFIG_SYS_I2C_SPEED 100000
225 #define CONFIG_SYS_MXC_I2C3_SPEED 400000
227 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
228 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
229 #define CONFIG_SYS_I2C_EEPROM_BUS 2
232 #define CONFIG_CMD_SATA
233 #define CONFIG_SYS_SATA_MAX_DEVICE 1
234 #define CONFIG_LIBATA
236 #define CONFIG_DWC_AHSATA
237 #define CONFIG_DWC_AHSATA_PORT_ID 0
238 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
241 #define CONFIG_SYS_BOOTMAPSZ (8 << 20)
242 #define CONFIG_SERIAL_TAG
245 #define CONFIG_STACKSIZE (128 * 1024)
246 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
247 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */
248 #define CONFIG_OF_BOARD_SETUP
251 #include "imx6_spl.h"
252 #define CONFIG_SPL_BOARD_INIT
253 #define CONFIG_SPL_MMC_SUPPORT
254 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x80 /* offset 64 kb */
255 #define CONFIG_SYS_MONITOR_LEN (CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS / 2 * 1024)
256 #define CONFIG_SPL_SPI_SUPPORT
257 #define CONFIG_SPL_SPI_FLASH_SUPPORT
258 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
259 #define CONFIG_SPL_SPI_LOAD
263 #define CONFIG_VIDEO_IPUV3
264 #define CONFIG_IPUV3_CLK 260000000
265 #define CONFIG_IMX_HDMI
266 #define CONFIG_IMX_VIDEO_SKIP
267 #define CONFIG_CFB_CONSOLE
268 #define CONFIG_VGA_AS_SINGLE_DEVICE
269 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
270 #define CONFIG_CONSOLE_MUX
271 #define CONFIG_VIDEO_SW_CURSOR
273 #define CONFIG_SPLASH_SCREEN
274 #define CONFIG_SPLASH_SOURCE
275 #define CONFIG_CMD_BMP
276 #define CONFIG_VIDEO_BMP_RLE8
278 #define CONFIG_VIDEO_LOGO
279 #define CONFIG_VIDEO_BMP_LOGO
281 #endif /* __CONFIG_CM_FX6_H */