include/configs/cm_fx6.h

   1 /*
   2  * Config file for Compulab CM-FX6 board
   3  *
   4  * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
   5  *
   6  * Author: Nikita Kiryanov <nikita@compulab.co.il>
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 #ifndef __CONFIG_CM_FX6_H
  12 #define __CONFIG_CM_FX6_H
  13
  14 #include "mx6_common.h"
  15
  16 /* Machine config */
  17 #define CONFIG_SYS_LITTLE_ENDIAN
  18 #define CONFIG_MACH_TYPE                4273
  19
  20 /* CMD */
  21
  22 /* MMC */
  23 #define CONFIG_SYS_FSL_USDHC_NUM        3
  24 #define CONFIG_SYS_FSL_ESDHC_ADDR       USDHC2_BASE_ADDR
  25
  26 /* RAM */
  27 #define PHYS_SDRAM_1                    MMDC0_ARB_BASE_ADDR
  28 #define PHYS_SDRAM_2                    MMDC1_ARB_BASE_ADDR
  29 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
  30 #define CONFIG_NR_DRAM_BANKS            2
  31 #define CONFIG_SYS_MEMTEST_START        0x10000000
  32 #define CONFIG_SYS_MEMTEST_END          0x10010000
  33 #define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
  34 #define CONFIG_SYS_INIT_RAM_SIZE        IRAM_SIZE
  35 #define CONFIG_SYS_INIT_SP_OFFSET \
  36         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  37 #define CONFIG_SYS_INIT_SP_ADDR \
  38         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  39
  40 /* Serial console */
  41 #define CONFIG_MXC_UART
  42 #define CONFIG_MXC_UART_BASE            UART4_BASE
  43 #define CONFIG_BAUDRATE                 115200
  44 #define CONFIG_SYS_BAUDRATE_TABLE       {9600, 19200, 38400, 57600, 115200}
  45
  46 /* Shell */
  47 #define CONFIG_SYS_PBSIZE       (CONFIG_SYS_CBSIZE + \
  48                                         sizeof(CONFIG_SYS_PROMPT) + 16)
  49
  50 /* SPI flash */
  51 #define CONFIG_SF_DEFAULT_BUS           0
  52 #define CONFIG_SF_DEFAULT_CS            0
  53 #define CONFIG_SF_DEFAULT_SPEED         25000000
  54 #define CONFIG_SF_DEFAULT_MODE          (SPI_MODE_0)
  55
  56 /* Environment */
  57 #define CONFIG_ENV_IS_IN_SPI_FLASH
  58 #define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
  59 #define CONFIG_ENV_SPI_MODE             CONFIG_SF_DEFAULT_MODE
  60 #define CONFIG_ENV_SPI_BUS              CONFIG_SF_DEFAULT_BUS
  61 #define CONFIG_ENV_SPI_CS               CONFIG_SF_DEFAULT_CS
  62 #define CONFIG_ENV_SECT_SIZE            (64 * 1024)
  63 #define CONFIG_ENV_SIZE                 (8 * 1024)
  64 #define CONFIG_ENV_OFFSET               (768 * 1024)
  65
  66 #define CONFIG_EXTRA_ENV_SETTINGS \
  67         "stdin=serial,usbkbd\0" \
  68         "stdout=serial,vga\0" \
  69         "stderr=serial,vga\0" \
  70         "panel=HDMI\0" \
  71         "autoload=no\0" \
  72         "kernel=uImage-cm-fx6\0" \
  73         "script=boot.scr\0" \
  74         "dtb=cm-fx6.dtb\0" \
  75         "bootm_low=18000000\0" \
  76         "loadaddr=0x10800000\0" \
  77         "fdtaddr=0x11000000\0" \
  78         "console=ttymxc3,115200\0" \
  79         "ethprime=FEC0\0" \
  80         "video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \
  81         "video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \
  82         "doboot=bootm ${loadaddr}\0" \
  83         "doloadfdt=false\0" \
  84         "setboottypez=setenv kernel zImage-cm-fx6;" \
  85                 "setenv doboot bootz ${loadaddr} - ${fdtaddr};" \
  86                 "setenv doloadfdt true;\0" \
  87         "setboottypem=setenv kernel uImage-cm-fx6;" \
  88                 "setenv doboot bootm ${loadaddr};" \
  89                 "setenv doloadfdt false;\0"\
  90         "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
  91         "sataroot=/dev/sda2 rw rootwait\0" \
  92         "nandroot=/dev/mtdblock4 rw\0" \
  93         "nandrootfstype=ubifs\0" \
  94         "mmcargs=setenv bootargs console=${console} root=${mmcroot} " \
  95                 "${video}\0" \
  96         "sataargs=setenv bootargs console=${console} root=${sataroot} " \
  97                 "${video}\0" \
  98         "nandargs=setenv bootargs console=${console} " \
  99                 "root=${nandroot} " \
 100                 "rootfstype=${nandrootfstype} " \
 101                 "${video}\0" \
 102         "nandboot=if run nandloadkernel; then " \
 103                         "run nandloadfdt;" \
 104                         "run setboottypem;" \
 105                         "run storagebootcmd;" \
 106                         "run setboottypez;" \
 107                         "run storagebootcmd;" \
 108                 "fi;\0" \
 109         "run_eboot=echo Starting EBOOT ...; "\
 110                 "mmc dev 2 && " \
 111                 "mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \
 112         "loadscript=load ${storagetype} ${storagedev} ${loadaddr} ${script};\0"\
 113         "loadkernel=load ${storagetype} ${storagedev} ${loadaddr} ${kernel};\0"\
 114         "loadfdt=load ${storagetype} ${storagedev} ${fdtaddr} ${dtb};\0" \
 115         "bootscript=echo Running bootscript from ${storagetype} ...;" \
 116                    "source ${loadaddr};\0" \
 117         "nandloadkernel=nand read ${loadaddr} 0 780000;\0" \
 118         "nandloadfdt=nand read ${fdtaddr} 780000 80000;\0" \
 119         "setupmmcboot=setenv storagetype mmc; setenv storagedev 2;\0" \
 120         "setupsataboot=setenv storagetype sata; setenv storagedev 0;\0" \
 121         "setupnandboot=setenv storagetype nand;\0" \
 122         "setupusbboot=setenv storagetype usb; setenv storagedev 0;\0" \
 123         "storagebootcmd=echo Booting from ${storagetype} ...;" \
 124                         "run ${storagetype}args; run doboot;\0" \
 125         "trybootk=if run loadkernel; then " \
 126                 "if ${doloadfdt}; then " \
 127                         "run loadfdt;" \
 128                 "fi;" \
 129                 "run storagebootcmd;" \
 130                 "fi;\0" \
 131         "trybootsmz=if run loadscript; then " \
 132                         "run bootscript;" \
 133                 "fi;" \
 134                 "run setboottypem;" \
 135                 "run trybootk;" \
 136                 "run setboottypez;" \
 137                 "run trybootk;\0"
 138
 139 #define CONFIG_BOOTCOMMAND \
 140         "run setupmmcboot;" \
 141         "mmc dev ${storagedev};" \
 142         "if mmc rescan; then " \
 143                 "run trybootsmz;" \
 144         "fi;" \
 145         "run setupusbboot;" \
 146         "if usb start; then "\
 147                 "if run loadscript; then " \
 148                         "run bootscript;" \
 149                 "fi;" \
 150         "fi;" \
 151         "run setupsataboot;" \
 152         "if sata init; then " \
 153                 "run trybootsmz;" \
 154         "fi;" \
 155         "run setupnandboot;" \
 156         "run nandboot;"
 157
 158 #define CONFIG_PREBOOT          "usb start"
 159
 160 /* SPI */
 161 #define CONFIG_SPI
 162 #define CONFIG_MXC_SPI
 163
 164 /* NAND */
 165 #ifndef CONFIG_SPL_BUILD
 166 #define CONFIG_CMD_NAND
 167 #define CONFIG_SYS_NAND_BASE            0x40000000
 168 #define CONFIG_SYS_NAND_MAX_CHIPS       1
 169 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 170 #define CONFIG_NAND_MXS
 171 #define CONFIG_SYS_NAND_ONFI_DETECTION
 172 /* APBH DMA is required for NAND support */
 173 #define CONFIG_APBH_DMA
 174 #define CONFIG_APBH_DMA_BURST
 175 #define CONFIG_APBH_DMA_BURST8
 176 #endif
 177
 178 /* Ethernet */
 179 #define CONFIG_FEC_MXC
 180 #define CONFIG_FEC_MXC_PHYADDR          0
 181 #define CONFIG_FEC_XCV_TYPE             RGMII
 182 #define IMX_FEC_BASE                    ENET_BASE_ADDR
 183 #define CONFIG_PHYLIB
 184 #define CONFIG_PHY_ATHEROS
 185 #define CONFIG_MII
 186 #define CONFIG_ETHPRIME                 "FEC0"
 187 #define CONFIG_ARP_TIMEOUT              200UL
 188 #define CONFIG_NET_RETRY_COUNT          5
 189
 190 /* USB */
 191 #define CONFIG_MXC_USB_PORTSC           (PORT_PTS_UTMI | PORT_PTS_PTW)
 192 #define CONFIG_MXC_USB_FLAGS            0
 193 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
 194 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET        /* For OTG port */
 195 #define CONFIG_SYS_STDIO_DEREGISTER
 196
 197 /* I2C */
 198 #define CONFIG_SYS_I2C
 199 #define CONFIG_SYS_I2C_MXC
 200 #define CONFIG_SYS_I2C_MXC_I2C1         /* enable I2C bus 1 */
 201 #define CONFIG_SYS_I2C_MXC_I2C2         /* enable I2C bus 2 */
 202 #define CONFIG_SYS_I2C_MXC_I2C3         /* enable I2C bus 3 */
 203 #define CONFIG_SYS_I2C_SPEED            100000
 204 #define CONFIG_SYS_MXC_I2C3_SPEED       400000
 205
 206 #define CONFIG_SYS_I2C_EEPROM_ADDR      0x50
 207 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  1
 208 #define CONFIG_SYS_I2C_EEPROM_BUS       2
 209
 210 /* SATA */
 211 #define CONFIG_CMD_SATA
 212 #define CONFIG_SYS_SATA_MAX_DEVICE      1
 213 #define CONFIG_LIBATA
 214 #define CONFIG_LBA48
 215 #define CONFIG_DWC_AHSATA
 216 #define CONFIG_DWC_AHSATA_PORT_ID       0
 217 #define CONFIG_DWC_AHSATA_BASE_ADDR     SATA_ARB_BASE_ADDR
 218
 219 /* Boot */
 220 #define CONFIG_SYS_BOOTMAPSZ            (8 << 20)
 221 #define CONFIG_SERIAL_TAG
 222
 223 /* misc */
 224 #define CONFIG_STACKSIZE                        (128 * 1024)
 225 #define CONFIG_SYS_MALLOC_LEN                   (10 * 1024 * 1024)
 226 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS      800 /* 400 KB */
 227 #define CONFIG_MISC_INIT_R
 228
 229 /* SPL */
 230 #include "imx6_spl.h"
 231 #define CONFIG_SPL_MMC_SUPPORT
 232 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x80 /* offset 64 kb */
 233 #define CONFIG_SYS_MONITOR_LEN  (CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS / 2 * 1024)
 234 #define CONFIG_SPL_SPI_SUPPORT
 235 #define CONFIG_SPL_SPI_FLASH_SUPPORT
 236 #define CONFIG_SYS_SPI_U_BOOT_OFFS      (64 * 1024)
 237 #define CONFIG_SPL_SPI_LOAD
 238
 239 /* Display */
 240 #define CONFIG_VIDEO
 241 #define CONFIG_VIDEO_IPUV3
 242 #define CONFIG_IPUV3_CLK          260000000
 243 #define CONFIG_IMX_HDMI
 244 #define CONFIG_CFB_CONSOLE
 245 #define CONFIG_VGA_AS_SINGLE_DEVICE
 246 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 247 #define CONFIG_CONSOLE_MUX
 248 #define CONFIG_VIDEO_SW_CURSOR
 249
 250 #define CONFIG_SPLASH_SCREEN
 251 #define CONFIG_SPLASH_SOURCE
 252 #define CONFIG_CMD_BMP
 253 #define CONFIG_VIDEO_BMP_RLE8
 254
 255 #define CONFIG_VIDEO_LOGO
 256 #define CONFIG_VIDEO_BMP_LOGO
 257
 258 /* EEPROM */
 259 #define CONFIG_CMD_EEPROM
 260 #define CONFIG_ENV_EEPROM_IS_ON_I2C
 261 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          1
 262 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       4
 263 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   5
 264 #define CONFIG_SYS_EEPROM_SIZE                  256
 265
 266 #define CONFIG_CMD_EEPROM_LAYOUT
 267 #define CONFIG_EEPROM_LAYOUT_HELP_STRING "v2, v3"
 268
 269 #endif  /* __CONFIG_CM_FX6_H */