Merge https://gitlab.denx.de/u-boot/custodians/u-boot-pmic
[platform/kernel/u-boot.git] / include / configs / cl-som-imx7.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2015 CompuLab, Ltd.
4  *
5  * Configuration settings for the CompuLab CL-SOM-iMX7 System-on-Module.
6  */
7
8 #ifndef __CL_SOM_IMX7_CONFIG_H
9 #define __CL_SOM_IMX7_CONFIG_H
10
11 #include "mx7_common.h"
12
13 #define CONFIG_MXC_UART_BASE            UART1_IPS_BASE_ADDR
14
15 /* Network */
16 #define CONFIG_FEC_MXC_PHYADDR          0
17
18 /* ENET1 */
19 #define IMX_FEC_BASE                    ENET_IPS_BASE_ADDR
20
21 /* PMIC */
22 #define CONFIG_POWER_PFUZE3000
23 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
24
25 #define CONFIG_PCA953X
26 #define CONFIG_SYS_I2C_PCA953X_ADDR     0x20
27 #define CONFIG_SYS_I2C_PCA953X_WIDTH    { {0x20, 16} }
28
29 #undef CONFIG_SYS_AUTOLOAD
30 #undef CONFIG_EXTRA_ENV_SETTINGS
31
32 #define CONFIG_SYS_AUTOLOAD             "no"
33
34 #define CONFIG_EXTRA_ENV_SETTINGS \
35         "autoload=off\0" \
36         "script=boot.scr\0" \
37         "loadscript=load ${storagetype} ${storagedev} ${loadaddr} ${script};\0" \
38         "loadkernel=load ${storagetype} ${storagedev} ${loadaddr} ${kernel};\0" \
39         "loadfdt=load ${storagetype} ${storagedev} ${fdtaddr} ${fdtfile};\0" \
40         "bootscript=echo Running bootscript from ${storagetype} ...; source ${loadaddr};\0" \
41         "storagebootcmd=echo Booting from ${storagetype} ...; run ${storagetype}args; run doboot;\0" \
42         "kernel=zImage\0" \
43         "console=ttymxc0\0" \
44         "fdt_high=0xffffffff\0" \
45         "initrd_high=0xffffffff\0" \
46         "fdtfile=imx7d-sbc-imx7.dtb\0" \
47         "fdtaddr=0x83000000\0" \
48         "mmcdev_def="__stringify(CONFIG_SYS_MMC_DEV)"\0" \
49         "usbdev_def="__stringify(CONFIG_SYS_USB_DEV)"\0" \
50         "mmcpart=1\0" \
51         "usbpart=" __stringify(CONFIG_SYS_USB_IMG_LOAD_PART) "\0" \
52         "doboot=bootz ${loadaddr} - ${fdtaddr}\0" \
53         "mmc_config=mmc dev ${mmcdev}; mmc rescan\0" \
54         "mmcargs=setenv bootargs console=${console},${baudrate} " \
55                 "root=/dev/mmcblk${mmcblk}p2 rootwait rw\0" \
56         "mmcbootscript=" \
57                 "if run mmc_config; then " \
58                         "setenv storagetype mmc;" \
59                         "setenv storagedev ${mmcdev}:${mmcpart};" \
60                         "if run loadscript; then " \
61                                 "run bootscript; " \
62                         "fi; " \
63                 "fi;\0" \
64         "mmcboot=" \
65                 "if run mmc_config; then " \
66                         "setenv storagetype mmc;" \
67                         "setenv storagedev ${mmcdev}:${mmcpart};" \
68                         "if run loadkernel; then " \
69                                 "if run loadfdt; then " \
70                                         "run storagebootcmd;" \
71                                 "fi; " \
72                         "fi; " \
73                 "fi;\0" \
74         "sdbootscript=setenv mmcdev ${mmcdev_def}; setenv mmcblk 0; " \
75                 "run mmcbootscript\0" \
76         "usbbootscript=setenv usbdev ${usbdev_def}; " \
77                 "setenv storagetype usb;" \
78                 "setenv storagedev ${usbdev}:${usbpart};" \
79                 "if run loadscript; then " \
80                         "run bootscript; " \
81                 "fi; " \
82         "sdboot=setenv mmcdev ${mmcdev_def}; setenv mmcblk 0; run mmcboot\0" \
83         "emmcbootscript=setenv mmcdev 1; setenv mmcblk 2; run mmcbootscript\0" \
84         "emmcboot=setenv mmcdev 1; setenv mmcblk 2; run mmcboot\0" \
85
86 /* Physical Memory Map */
87 #define PHYS_SDRAM                      MMDC0_ARB_BASE_ADDR
88
89 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM
90 #define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
91 #define CONFIG_SYS_INIT_RAM_SIZE        IRAM_SIZE
92
93 #define CONFIG_SYS_INIT_SP_OFFSET \
94         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
95 #define CONFIG_SYS_INIT_SP_ADDR \
96         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
97
98 /* SPI Flash support */
99
100 /* FLASH and environment organization */
101
102 /* MMC Config*/
103 #ifdef CONFIG_FSL_USDHC
104 #define CONFIG_SYS_FSL_ESDHC_ADDR       USDHC1_BASE_ADDR
105
106 #define CONFIG_SYS_FSL_USDHC_NUM        2
107 #endif
108
109 /* USB Configs */
110 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
111 #define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
112 #define CONFIG_MXC_USB_FLAGS   0
113 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
114
115 /* SPL */
116 #include "imx7_spl.h"
117
118 #endif  /* __CONFIG_H */