1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2015 CompuLab, Ltd.
5 * Configuration settings for the CompuLab CL-SOM-iMX7 System-on-Module.
8 #ifndef __CL_SOM_IMX7_CONFIG_H
9 #define __CL_SOM_IMX7_CONFIG_H
11 #include "mx7_common.h"
13 #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
16 #define CONFIG_FEC_XCV_TYPE RGMII
17 #define CONFIG_ETHPRIME "FEC"
18 #define CONFIG_FEC_MXC_PHYADDR 0
21 #define IMX_FEC_BASE ENET_IPS_BASE_ADDR
24 #define CONFIG_POWER_PFUZE3000
25 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
27 #define CONFIG_PCA953X
28 #define CONFIG_SYS_I2C_PCA953X_ADDR 0x20
29 #define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} }
31 #undef CONFIG_SYS_AUTOLOAD
32 #undef CONFIG_EXTRA_ENV_SETTINGS
34 #define CONFIG_SYS_AUTOLOAD "no"
36 #define CONFIG_EXTRA_ENV_SETTINGS \
39 "loadscript=load ${storagetype} ${storagedev} ${loadaddr} ${script};\0" \
40 "loadkernel=load ${storagetype} ${storagedev} ${loadaddr} ${kernel};\0" \
41 "loadfdt=load ${storagetype} ${storagedev} ${fdtaddr} ${fdtfile};\0" \
42 "bootscript=echo Running bootscript from ${storagetype} ...; source ${loadaddr};\0" \
43 "storagebootcmd=echo Booting from ${storagetype} ...; run ${storagetype}args; run doboot;\0" \
46 "fdt_high=0xffffffff\0" \
47 "initrd_high=0xffffffff\0" \
48 "fdtfile=imx7d-sbc-imx7.dtb\0" \
49 "fdtaddr=0x83000000\0" \
50 "mmcdev_def="__stringify(CONFIG_SYS_MMC_DEV)"\0" \
51 "usbdev_def="__stringify(CONFIG_SYS_USB_DEV)"\0" \
52 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
53 "usbpart=" __stringify(CONFIG_SYS_USB_IMG_LOAD_PART) "\0" \
54 "doboot=bootz ${loadaddr} - ${fdtaddr}\0" \
55 "mmc_config=mmc dev ${mmcdev}; mmc rescan\0" \
56 "mmcargs=setenv bootargs console=${console},${baudrate} " \
57 "root=/dev/mmcblk${mmcblk}p2 rootwait rw\0" \
59 "if run mmc_config; then " \
60 "setenv storagetype mmc;" \
61 "setenv storagedev ${mmcdev}:${mmcpart};" \
62 "if run loadscript; then " \
67 "if run mmc_config; then " \
68 "setenv storagetype mmc;" \
69 "setenv storagedev ${mmcdev}:${mmcpart};" \
70 "if run loadkernel; then " \
71 "if run loadfdt; then " \
72 "run storagebootcmd;" \
76 "sdbootscript=setenv mmcdev ${mmcdev_def}; setenv mmcblk 0; " \
77 "run mmcbootscript\0" \
78 "usbbootscript=setenv usbdev ${usbdev_def}; " \
79 "setenv storagetype usb;" \
80 "setenv storagedev ${usbdev}:${usbpart};" \
81 "if run loadscript; then " \
84 "sdboot=setenv mmcdev ${mmcdev_def}; setenv mmcblk 0; run mmcboot\0" \
85 "emmcbootscript=setenv mmcdev 1; setenv mmcblk 2; run mmcbootscript\0" \
86 "emmcboot=setenv mmcdev 1; setenv mmcblk 2; run mmcboot\0" \
88 /* Physical Memory Map */
89 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
91 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
92 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
93 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
95 #define CONFIG_SYS_INIT_SP_OFFSET \
96 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
97 #define CONFIG_SYS_INIT_SP_ADDR \
98 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
100 /* SPI Flash support */
102 /* FLASH and environment organization */
105 #ifdef CONFIG_FSL_USDHC
106 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR
108 #define CONFIG_SYS_FSL_USDHC_NUM 2
109 #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */
113 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
114 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
115 #define CONFIG_MXC_USB_FLAGS 0
116 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
119 #include "imx7_spl.h"
121 #endif /* __CONFIG_H */