1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2015 CompuLab, Ltd.
5 * Configuration settings for the CompuLab CL-SOM-iMX7 System-on-Module.
8 #ifndef __CL_SOM_IMX7_CONFIG_H
9 #define __CL_SOM_IMX7_CONFIG_H
11 #include "mx7_common.h"
13 #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
15 /* Size of malloc() pool */
16 #define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
18 #define CONFIG_BOARD_LATE_INIT
21 #define CONFIG_FEC_MXC
22 #define CONFIG_FEC_XCV_TYPE RGMII
23 #define CONFIG_ETHPRIME "FEC"
24 #define CONFIG_FEC_MXC_PHYADDR 0
27 #define IMX_FEC_BASE ENET_IPS_BASE_ADDR
31 #define CONFIG_POWER_I2C
32 #define CONFIG_POWER_PFUZE3000
33 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
36 #define CONFIG_SYS_I2C
37 #define CONFIG_SYS_I2C_MXC
38 #define CONFIG_SYS_I2C_MXC_I2C2 /* Enable I2C bus 2 */
39 #define CONFIG_SYS_I2C_SPEED 100000
40 #define SYS_I2C_BUS_SOM 0
42 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
43 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
44 #define CONFIG_SYS_I2C_EEPROM_BUS SYS_I2C_BUS_SOM
46 #define CONFIG_PCA953X
47 #define CONFIG_CMD_PCA953X
48 #define CONFIG_SYS_I2C_PCA953X_ADDR 0x20
49 #define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} }
51 #undef CONFIG_SYS_AUTOLOAD
52 #undef CONFIG_EXTRA_ENV_SETTINGS
53 #undef CONFIG_BOOTCOMMAND
55 #define CONFIG_SYS_AUTOLOAD "no"
57 #define CONFIG_EXTRA_ENV_SETTINGS \
60 "loadscript=load ${storagetype} ${storagedev} ${loadaddr} ${script};\0" \
61 "loadkernel=load ${storagetype} ${storagedev} ${loadaddr} ${kernel};\0" \
62 "loadfdt=load ${storagetype} ${storagedev} ${fdtaddr} ${fdtfile};\0" \
63 "bootscript=echo Running bootscript from ${storagetype} ...; source ${loadaddr};\0" \
64 "storagebootcmd=echo Booting from ${storagetype} ...; run ${storagetype}args; run doboot;\0" \
67 "fdt_high=0xffffffff\0" \
68 "initrd_high=0xffffffff\0" \
69 "fdtfile=imx7d-sbc-imx7.dtb\0" \
70 "fdtaddr=0x83000000\0" \
71 "mmcdev_def="__stringify(CONFIG_SYS_MMC_DEV)"\0" \
72 "usbdev_def="__stringify(CONFIG_SYS_USB_DEV)"\0" \
73 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
74 "usbpart=" __stringify(CONFIG_SYS_USB_IMG_LOAD_PART) "\0" \
75 "doboot=bootz ${loadaddr} - ${fdtaddr}\0" \
76 "mmc_config=mmc dev ${mmcdev}; mmc rescan\0" \
77 "mmcargs=setenv bootargs console=${console},${baudrate} " \
78 "root=/dev/mmcblk${mmcblk}p2 rootwait rw\0" \
80 "if run mmc_config; then " \
81 "setenv storagetype mmc;" \
82 "setenv storagedev ${mmcdev}:${mmcpart};" \
83 "if run loadscript; then " \
88 "if run mmc_config; then " \
89 "setenv storagetype mmc;" \
90 "setenv storagedev ${mmcdev}:${mmcpart};" \
91 "if run loadkernel; then " \
92 "if run loadfdt; then " \
93 "run storagebootcmd;" \
97 "sdbootscript=setenv mmcdev ${mmcdev_def}; setenv mmcblk 0; " \
98 "run mmcbootscript\0" \
99 "usbbootscript=setenv usbdev ${usbdev_def}; " \
100 "setenv storagetype usb;" \
101 "setenv storagedev ${usbdev}:${usbpart};" \
102 "if run loadscript; then " \
105 "sdboot=setenv mmcdev ${mmcdev_def}; setenv mmcblk 0; run mmcboot\0" \
106 "emmcbootscript=setenv mmcdev 1; setenv mmcblk 2; run mmcbootscript\0" \
107 "emmcboot=setenv mmcdev 1; setenv mmcblk 2; run mmcboot\0" \
109 #define CONFIG_BOOTCOMMAND \
110 "echo SD boot attempt ...; run sdbootscript; run sdboot; " \
111 "echo eMMC boot attempt ...; run emmcbootscript; run emmcboot; " \
112 "echo USB boot attempt ...; run usbbootscript; "
114 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
115 #define CONFIG_SYS_HZ 1000
117 /* Physical Memory Map */
118 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
120 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
121 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
122 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
124 #define CONFIG_SYS_INIT_SP_OFFSET \
125 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
126 #define CONFIG_SYS_INIT_SP_ADDR \
127 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
129 /* SPI Flash support */
131 /* FLASH and environment organization */
134 #ifdef CONFIG_FSL_USDHC
135 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR
137 #define CONFIG_SYS_FSL_USDHC_NUM 2
138 #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */
142 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
143 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
144 #define CONFIG_MXC_USB_FLAGS 0
145 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
147 /* Uncomment to enable iMX thermal driver support */
148 /*#define CONFIG_IMX_THERMAL*/
151 #include "imx7_spl.h"
153 #endif /* __CONFIG_H */