1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2017-2018 NXP
4 * Copyright 2018 congatec AG
11 #include <linux/sizes.h>
12 #include <asm/arch/imx-regs.h>
14 #ifdef CONFIG_SPL_BUILD
15 #define CONFIG_SYS_MONITOR_LEN (1024 * 1024)
17 #define CONFIG_SERIAL_LPUART_BASE 0x5a060000
18 #define CONFIG_MALLOC_F_ADDR 0x00120000
20 #define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE
24 /* Flat Device Tree Definitions */
26 #define CONFIG_SYS_BOOTMAPSZ (256 << 20)
27 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
28 #define USDHC1_BASE_ADDR 0x5B010000
29 #define USDHC2_BASE_ADDR 0x5B020000
30 #define USDHC3_BASE_ADDR 0x5B030000
34 "m4_0_image=m4_0.bin\0" \
35 "m4_1_image=m4_1.bin\0" \
36 "loadm4image_0=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4_0_image}\0" \
37 "loadm4image_1=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4_1_image}\0" \
38 "m4boot_0=run loadm4image_0; dcache flush; bootaux ${loadaddr} 0\0" \
39 "m4boot_1=run loadm4image_1; dcache flush; bootaux ${loadaddr} 1\0" \
41 #ifdef CONFIG_NAND_BOOT
42 #define MFG_NAND_PARTITION "mtdparts=gpmi-nand:128m(boot),32m(kernel),16m(dtb),8m(misc),-(rootfs) "
44 #define MFG_NAND_PARTITION ""
46 #define FEC0_RESET IMX_GPIO_NR(2, 5)
47 #define FEC0_PDOMAIN "conn_enet0"
49 #define CONFIG_MFG_ENV_SETTINGS \
50 "mfgtool_args=setenv bootargs console=${console},${baudrate} " \
52 "g_mass_storage.stall=0 g_mass_storage.removable=1 " \
53 "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
54 "g_mass_storage.iSerialNumber=\"\" "\
58 "initrd_addr=0x83800000\0" \
59 "bootcmd_mfg=run mfgtool_args;booti ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \
61 /* Initial environment variables */
62 #define CONFIG_EXTRA_ENV_SETTINGS \
63 CONFIG_MFG_ENV_SETTINGS \
69 "fdt_addr=0x83000000\0" \
71 "fdt_file=imx8qm-cgt-qmx8.dtb\0" \
72 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
74 "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
75 "mmcautodetect=yes\0" \
76 "mmcargs=setenv bootargs console=${console},${baudrate} root=${mmcroot} earlycon\0 " \
77 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
78 "bootscript=echo Running bootscript from mmc ...; " \
80 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
81 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
82 "mmcboot=echo Booting from mmc ...; " \
84 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
85 "if run loadfdt; then " \
86 "booti ${loadaddr} - ${fdt_addr}; " \
88 "echo WARN: Cannot load the DT; " \
91 "echo wait for boot; " \
93 "netargs=setenv bootargs console=${console},${baudrate} " \
95 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp rw earlycon\0" \
96 "netboot=echo Booting from net ...; " \
98 "if test ${ip_dyn} = yes; then " \
99 "setenv get_cmd dhcp; " \
101 "setenv get_cmd tftp; " \
103 "${get_cmd} ${loadaddr} ${image}; " \
104 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
105 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
106 "booti ${loadaddr} - ${fdt_addr}; " \
108 "echo WARN: Cannot load the DT; " \
114 /* Link Definitions */
116 #define CONFIG_SYS_FSL_USDHC_NUM 3
118 #define CONFIG_SYS_SDRAM_BASE 0x80000000
119 #define PHYS_SDRAM_1 0x80000000
120 #define PHYS_SDRAM_2 0x880000000
121 #define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */
122 #define PHYS_SDRAM_2_SIZE 0x100000000 /* 4 GB */
125 #define CONFIG_FEC_MXC_PHYADDR -1
127 #endif /* __CGTQMX8_H */