3 * Congatec Conga-QEVAl board configuration file.
5 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
6 * Based on Freescale i.MX6Q Sabre Lite board configuration file.
7 * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
8 * Leo Sartre, <lsartre@adeneo-embedded.com>
10 * SPDX-License-Identifier: GPL-2.0+
13 #ifndef __CONFIG_CGTQMX6EVAL_H
14 #define __CONFIG_CGTQMX6EVAL_H
16 #include "mx6_common.h"
18 #define CONFIG_MACH_TYPE 4122
20 /* Size of malloc() pool */
21 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
23 #define CONFIG_BOARD_EARLY_INIT_F
24 #define CONFIG_MISC_INIT_R
25 #define CONFIG_MXC_GPIO
27 #define CONFIG_MXC_UART
28 #define CONFIG_MXC_UART_BASE UART2_BASE
31 #define CONFIG_FSL_ESDHC
32 #define CONFIG_FSL_USDHC
33 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
36 #define CONFIG_CMD_MMC
37 #define CONFIG_GENERIC_MMC
38 #define CONFIG_BOUNCE_BUFFER
39 #define CONFIG_CMD_EXT2
40 #define CONFIG_CMD_FAT
41 #define CONFIG_DOS_PARTITION
43 /* Miscellaneous commands */
44 #define CONFIG_CMD_BMODE
46 /* allow to overwrite serial and ethaddr */
47 #define CONFIG_ENV_OVERWRITE
48 #define CONFIG_CONS_INDEX 1
49 #define CONFIG_BAUDRATE 115200
51 /* Command definition */
53 #define CONFIG_BOOTDELAY 3
55 #define CONFIG_LOADADDR 0x12000000
56 #define CONFIG_SYS_TEXT_BASE 0x17800000
58 #define CONFIG_DEFAULT_FDT_FILE "imx6q-congatec.dtb"
60 #define CONFIG_EXTRA_ENV_SETTINGS \
63 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
66 "fdt_high=0xffffffff\0" \
67 "initrd_high=0xffffffff\0" \
68 "fdt_addr=0x18000000\0" \
72 "mmcroot=/dev/mmcblk0p1 rootwait rw\0" \
73 "mmcargs=setenv bootargs console=${console},${baudrate} " \
76 "ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
77 "bootscript=echo Running bootscript from mmc ...; " \
79 "loadimage=ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \
80 "${boot_dir}/${image}\0" \
81 "loadfdt=ext2load mmc ${mmcdev}:${mmcpart} ${fdt_addr} " \
82 "${boot_dir}/${fdt_file}\0" \
83 "mmcboot=echo Booting from mmc ...; " \
85 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
86 "if run loadfdt; then " \
87 "bootz ${loadaddr} - ${fdt_addr}; " \
89 "if test ${boot_fdt} = try; then " \
92 "echo WARN: Cannot load the DT; " \
99 #define CONFIG_BOOTCOMMAND \
100 "mmc dev ${mmcdev};" \
101 "mmc dev ${mmcdev}; if mmc rescan; then " \
102 "if run loadbootscript; then " \
105 "if run loadimage; then " \
108 "echo ERR: Fail to boot from mmc; " \
111 "else echo ERR: Fail to boot from mmc; fi"
113 /* Miscellaneous configurable options */
114 #define CONFIG_SYS_LONGHELP
115 #define CONFIG_SYS_HUSH_PARSER
116 #define CONFIG_SYS_PROMPT "CGT-QMX6-Quad U-Boot > "
117 #define CONFIG_AUTO_COMPLETE
118 #define CONFIG_SYS_CBSIZE 256
120 /* Print Buffer Size */
121 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
122 #define CONFIG_SYS_MAXARGS 16
123 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
125 #define CONFIG_SYS_MEMTEST_START 0x10000000
126 #define CONFIG_SYS_MEMTEST_END 0x10010000
127 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
129 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
131 #define CONFIG_CMDLINE_EDITING
133 /* Physical Memory Map */
134 #define CONFIG_NR_DRAM_BANKS 1
135 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
136 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
138 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
139 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
140 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
142 #define CONFIG_SYS_INIT_SP_OFFSET \
143 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
144 #define CONFIG_SYS_INIT_SP_ADDR \
145 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
147 /* Environment organization */
148 #define CONFIG_ENV_SIZE (8 * 1024)
150 #define CONFIG_ENV_IS_IN_MMC
152 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
153 #define CONFIG_SYS_MMC_ENV_DEV 0
155 #define CONFIG_OF_LIBFDT
156 #define CONFIG_CMD_BOOTZ
158 #ifndef CONFIG_SYS_DCACHE_OFF
159 #define CONFIG_CMD_CACHE
162 #endif /* __CONFIG_CGTQMX6EVAL_H */