Convert CONFIG_SPL_PAD_TO et al to Kconfig
[platform/kernel/u-boot.git] / include / configs / capricorn-common.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright 2017-2018 NXP
4  * Copyright 2019 Siemens AG
5  */
6
7 #ifndef __IMX8X_CAPRICORN_H
8 #define __IMX8X_CAPRICORN_H
9
10 #include <linux/sizes.h>
11 #include <asm/arch/imx-regs.h>
12
13 #include "siemens-env-common.h"
14
15 /* SPL config */
16 #ifdef CONFIG_SPL_BUILD
17
18 #define CONFIG_SYS_MONITOR_LEN          (1024 * 1024)
19
20 #define CONFIG_SPL_STACK                0x013E000
21 #define CONFIG_SPL_BSS_START_ADDR       0x00128000
22 #define CONFIG_SPL_BSS_MAX_SIZE         0x1000  /* 4 KB */
23 #define CONFIG_SYS_SPL_MALLOC_START     0x00120000
24 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x3000  /* 12 KB */
25 #define CONFIG_MALLOC_F_ADDR            0x00120000
26
27 #define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE
28 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
29
30 #endif /* CONFIG_SPL_BUILD */
31
32 #define CONFIG_FACTORYSET
33
34 /* ENET1 connects to base board and MUX with ESAI */
35 #define CONFIG_FEC_ENET_DEV             1
36 #define CONFIG_FEC_MXC_PHYADDR          0x0
37
38 /* I2C Configuration */
39 #ifndef CONFIG_SPL_BUILD
40 /* EEPROM */
41 #define  EEPROM_I2C_BUS         0 /* I2C0 */
42 #define  EEPROM_I2C_ADDR        0x50
43 /* PCA9552 */
44 #define  PCA9552_1_I2C_BUS      1 /* I2C1 */
45 #define  PCA9552_1_I2C_ADDR     0x60
46 #endif /* !CONFIG_SPL_BUILD */
47
48 /* AHAB */
49 #ifdef CONFIG_AHAB_BOOT
50 #define AHAB_ENV "sec_boot=yes\0"
51 #else
52 #define AHAB_ENV "sec_boot=no\0"
53 #endif
54
55 #define MFG_ENV_SETTINGS_DEFAULT \
56         "mfgtool_args=setenv bootargs console=${console},${baudrate} " \
57                 "rdinit=/linuxrc " \
58                 "clk_ignore_unused "\
59                 "\0" \
60         "kboot=booti\0"\
61         "bootcmd_mfg=run mfgtool_args;" \
62         "if iminfo ${initrd_addr}; then " \
63         "if test ${tee} = yes; then " \
64                 "bootm ${tee_addr} ${initrd_addr} ${fdt_addr}; " \
65         "else " \
66                 "booti ${loadaddr} ${initrd_addr} ${fdt_addr}; " \
67         "fi; " \
68         "else " \
69             "echo \"Run fastboot ...\"; fastboot 0; "  \
70         "fi;\0"
71
72 /* Boot M4 */
73 #define M4_BOOT_ENV \
74         "m4_0_image=m4_0.bin\0" \
75         "loadm4image_0=fatload mmc ${mmcdev}:${mmcpart} " \
76                         "${loadaddr} ${m4_0_image}\0" \
77         "m4boot_0=run loadm4image_0; dcache flush; bootaux ${loadaddr} 0\0" \
78
79 #define CONFIG_MFG_ENV_SETTINGS \
80         MFG_ENV_SETTINGS_DEFAULT \
81         "initrd_addr=0x83100000\0" \
82         "initrd_high=0xffffffffffffffff\0" \
83         "emmc_dev=0\0"
84
85 /* Initial environment variables */
86 #define CONFIG_EXTRA_ENV_SETTINGS \
87         CONFIG_MFG_ENV_SETTINGS \
88         M4_BOOT_ENV \
89         AHAB_ENV \
90         ENV_COMMON \
91         "script=boot.scr\0" \
92         "image=Image\0" \
93         "panel=NULL\0" \
94         "console=ttyLP2\0" \
95         "fdt_addr=0x83000000\0" \
96         "fdt_high=0xffffffffffffffff\0" \
97         "cntr_addr=0x88000000\0" \
98         "cntr_file=os_cntr_signed.bin\0" \
99         "initrd_addr=0x83800000\0" \
100         "initrd_high=0xffffffffffffffff\0" \
101         "netdev=eth0\0" \
102         "nfsopts=vers=3,udp,rsize=4096,wsize=4096,nolock rw\0" \
103         "hostname=capricorn\0" \
104         ENV_EMMC \
105         ENV_NET
106
107 /* Default location for tftp and bootm */
108 #define CONFIG_SYS_INIT_SP_ADDR         0x80200000
109
110 /* On CCP board, USDHC1 is for eMMC */
111
112 #define CONFIG_SYS_SDRAM_BASE           0x80000000
113 #define PHYS_SDRAM_1                    0x80000000
114 #define PHYS_SDRAM_2                    0x880000000
115 /* DDR3 board total DDR is 1 GB */
116 #define PHYS_SDRAM_1_SIZE               0x40000000      /* 1 GB */
117 #define PHYS_SDRAM_2_SIZE               0x00000000      /* 0 GB */
118
119 #define BOOTAUX_RESERVED_MEM_BASE       0x88000000
120 #define BOOTAUX_RESERVED_MEM_SIZE       SZ_128M /* Reserve from second 128MB */
121
122 #endif /* __IMX8X_CAPRICORN_H */