3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * SPDX-License-Identifier: GPL-2.0+
12 * High Level Configuration Options
16 #define CONFIG_MPC5200 1 /* This is a MPC5200 CPU */
17 #define CONFIG_CANMB 1 /* ... on canmb board - we need this for FEC.C */
20 * allowed and functional CONFIG_SYS_TEXT_BASE values:
21 * 0xfe000000 low boot at 0x00000100 (default board setting)
22 * 0x00100000 RAM load and test
24 #define CONFIG_SYS_TEXT_BASE 0xFE000000
26 #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
28 #define CONFIG_BOARD_EARLY_INIT_R
30 #define CONFIG_HIGH_BATS 1 /* High BATs supported */
33 * Serial console configuration
35 #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
36 #define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
37 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
43 #define CONFIG_BOOTP_BOOTFILESIZE
44 #define CONFIG_BOOTP_BOOTPATH
45 #define CONFIG_BOOTP_GATEWAY
46 #define CONFIG_BOOTP_HOSTNAME
50 * Command line configuration.
52 #include <config_cmd_default.h>
54 #define CONFIG_CMD_ASKENV
55 #define CONFIG_CMD_DATE
56 #define CONFIG_CMD_DHCP
57 #define CONFIG_CMD_IMMAP
58 #define CONFIG_CMD_MII
59 #define CONFIG_CMD_NFS
60 #define CONFIG_CMD_REGINFO
61 #define CONFIG_CMD_SNTP
65 * MUST be low boot - HIGHBOOT is not supported anymore
67 #if (CONFIG_SYS_TEXT_BASE == 0xFE000000) /* Boot low with 32 MB Flash */
68 # define CONFIG_SYS_LOWBOOT 1
69 # define CONFIG_SYS_LOWBOOT16 1
71 # error "CONFIG_SYS_TEXT_BASE must be 0xFE000000"
77 #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
79 #define CONFIG_PREBOOT "echo;" \
80 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
83 #undef CONFIG_BOOTARGS
85 #define CONFIG_EXTRA_ENV_SETTINGS \
87 "nfsargs=setenv bootargs root=/dev/nfs rw " \
88 "nfsroot=${serverip}:${rootpath}\0" \
89 "ramargs=setenv bootargs root=/dev/ram rw\0" \
90 "addip=setenv bootargs ${bootargs} " \
91 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
92 ":${hostname}:${netdev}:off panic=1\0" \
93 "flash_nfs=run nfsargs addip;" \
94 "bootm ${kernel_addr}\0" \
95 "flash_self=run ramargs addip;" \
96 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
97 "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
98 "rootpath=/opt/eldk/ppc_6xx\0" \
99 "bootfile=/tftpboot/canmb/uImage\0" \
102 #define CONFIG_BOOTCOMMAND "run flash_self"
105 * IPB Bus clocking configuration.
107 #undef CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
110 * Flash configuration, expect one 16 Megabyte Bank at most
112 #define CONFIG_SYS_FLASH_BASE 0xFE000000
113 #define CONFIG_SYS_FLASH_SIZE 0x02000000
114 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
115 #define CONFIG_SYS_MAX_FLASH_SECT 256 /* max num of sects on one chip */
117 #define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
118 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
120 #define CONFIG_FLASH_CFI_DRIVER
121 #define CONFIG_SYS_FLASH_CFI
122 #define CONFIG_SYS_FLASH_EMPTY_INFO
125 * Environment settings
127 #define CONFIG_ENV_IS_IN_FLASH 1
128 #define CONFIG_ENV_OFFSET (2*128*1024)
129 #define CONFIG_ENV_SIZE 0x2000
130 #define CONFIG_ENV_SECT_SIZE (128*1024)
135 * Warning!!! with the current BestComm Task, MBAR MUST BE set to 0xf0000000
137 #define CONFIG_SYS_MBAR 0xf0000000 /* DO NOT CHANGE this */
138 #define CONFIG_SYS_SDRAM_BASE 0x00000000
139 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
141 /* Use SRAM until RAM will be available */
142 #define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
143 #define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */
146 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
147 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
149 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
150 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
151 # define CONFIG_SYS_RAMBOOT 1
154 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
155 #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
156 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
159 * Ethernet configuration
161 #define CONFIG_MPC5xxx_FEC 1
162 #define CONFIG_MPC5xxx_FEC_MII100
163 #define CONFIG_PHY_ADDR 0x0
165 * GPIO configuration:
166 * PSC1,2,3 predefined as UART
168 * Ethernet 100 with MD
170 #define CONFIG_SYS_GPS_PORT_CONFIG 0x00058444
173 * Miscellaneous configurable options
175 #define CONFIG_SYS_LONGHELP /* undef to save memory */
176 #if defined(CONFIG_CMD_KGDB)
177 # define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
179 # define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
181 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
182 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
183 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
185 #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
186 #define CONFIG_SYS_MEMTEST_END 0x01f00000 /* 1 ... 31 MB in DRAM */
188 #define CONFIG_SYS_LOAD_ADDR 0x200000 /* default load address */
190 #define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
192 #define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
193 #if defined(CONFIG_CMD_KGDB)
194 # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
198 * Various low-level settings
200 #define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
201 #define CONFIG_SYS_HID0_FINAL HID0_ICE
203 #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
204 #define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
205 #define CONFIG_SYS_BOOTCS_CFG 0x00047D01
206 #define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
207 #define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
209 #define CONFIG_SYS_CS_BURST 0x00000000
210 #define CONFIG_SYS_CS_DEADCYCLE 0x33333333
212 #define CONFIG_SYS_RESET_ADDRESS 0x7f000000
214 #endif /* __CONFIG_H */