1 /* SPDX-License-Identifier: GPL-2.0+ */
5 * common parts used by B&R AM335x based boards
7 * Copyright (C) 2016 Hannes Schmelzer <oe5hpm@oevsv.at> -
8 * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
11 #ifndef __BUR_AM335X_COMMON_H__
12 #define __BUR_AM335X_COMMON_H__
13 /* ------------------------------------------------------------------------- */
15 /* legacy #defines for non DM bur-board */
17 #define CONFIG_SYS_NS16550_SERIAL
18 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
19 #define CONFIG_SYS_NS16550_CLK (48000000)
20 #define CONFIG_SYS_NS16550_COM1 0x44e09000
23 #define CONFIG_SYS_I2C
25 #endif /* CONFIG_DM */
27 #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */
29 /* Timer information */
30 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
31 #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
32 #define CONFIG_POWER_TPS65217
34 #include <asm/arch/omap.h>
37 * SPL related defines. The Public RAM memory map the ROM defines the
38 * area between 0x402F0400 and 0x4030B800 as a download area and
39 * 0x4030B800 to 0x4030CE00 as a public stack area. The ROM also
40 * supports X-MODEM loading via UART, and we leverage this and then use
41 * Y-MODEM to load u-boot.img, when booted over UART. We must also include
42 * the scratch space that U-Boot uses in SRAM.
44 #define CONFIG_SPL_TEXT_BASE 0x402F0400
45 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
49 * Since SPL did pll and ddr initialization for us,
50 * we don't need to do it twice.
52 #if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_NOR_BOOT)
53 #define CONFIG_SKIP_LOWLEVEL_INIT
54 #endif /* !CONFIG_SPL_BUILD, ... */
56 * Our DDR memory always starts at 0x80000000 and U-Boot shall have
57 * relocated itself to higher in memory by the time this value is used.
59 #define CONFIG_SYS_LOAD_ADDR 0x80000000
61 * ----------------------------------------------------------------------------
62 * DDR information. We say (for simplicity) that we have 1 bank,
63 * always, even when we have more. We always start at 0x80000000,
64 * and we place the initial stack pointer in our SRAM.
66 #define CONFIG_NR_DRAM_BANKS 1
67 #define CONFIG_SYS_SDRAM_BASE 0x80000000
68 #define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
69 GENERATED_GBL_DATA_SIZE)
72 * Our platforms make use of SPL to initalize the hardware (primarily
73 * memory) enough for full U-Boot to be loaded. We also support Falcon
74 * Mode so that the Linux kernel can be booted directly from SPL
75 * instead, if desired. We make use of the general SPL framework found
76 * under common/spl/. Given our generally common memory map, we set a
77 * number of related defaults and sizes here.
80 * Place the image at the start of the ROM defined image space.
81 * We limit our size to the ROM-defined downloaded image area, and use the
82 * rest of the space for stack. We load U-Boot itself into memory at
83 * 0x80800000 for legacy reasons (to not conflict with older SPLs). We
84 * have our BSS be placed 1MiB after this, to allow for the default
85 * Linux kernel address of 0x80008000 to work, in the Falcon Mode case.
86 * We have the SPL malloc pool at the end of the BSS area.
88 * ----------------------------------------------------------------------------
90 #define CONFIG_SPL_BSS_START_ADDR 0x80A00000
91 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
92 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
93 CONFIG_SPL_BSS_MAX_SIZE)
94 #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
96 /* General parts of the framework, required. */
98 #endif /* ! __BUR_AM335X_COMMON_H__ */