Merge branch 'master' of git://www.denx.de/git/u-boot-arc
[platform/kernel/u-boot.git] / include / configs / bf537-srv1.h
1 /*
2  * U-Boot - Configuration file for CSP Minotaur board
3  *
4  * Thu Oct 25 15:30:44 CEST 2007 <hackfin@section5.ch>
5  *    Minotaur config, brushed up for official uClinux dist.
6  *    Parallel flash support disabled, SPI flash boot command
7  *    added ('run flashboot').
8  *
9  * Flash image map:
10  *
11  * 0x00000000      u-boot bootstrap
12  * 0x00010000      environment
13  * 0x00020000      u-boot code
14  * 0x00030000      uImage.initramfs
15  *
16  */
17
18 #ifndef __CONFIG_BF537_SRV1_H__
19 #define __CONFIG_BF537_SRV1_H__
20
21 #include <asm/config-pre.h>
22
23 /*
24  * Processor Settings
25  */
26 #define CONFIG_BFIN_CPU             bf537-0.2
27 #define CONFIG_BFIN_BOOT_MODE       BFIN_BOOT_SPI_MASTER
28
29 /*
30  * Clock Settings
31  *      CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
32  *      SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
33  */
34 /* CONFIG_CLKIN_HZ is any value in Hz                                   */
35 #define CONFIG_CLKIN_HZ                 22118400
36 /* CLKIN_HALF controls the DF bit in PLL_CTL      0 = CLKIN             */
37 /*                                                1 = CLKIN / 2         */
38 #define CONFIG_CLKIN_HALF               0
39 /* PLL_BYPASS controls the BYPASS bit in PLL_CTL  0 = do not bypass     */
40 /*                                                1 = bypass PLL        */
41 #define CONFIG_PLL_BYPASS               0
42 /* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL              */
43 /* Values can range from 0-63 (where 0 means 64)                        */
44 #define CONFIG_VCO_MULT                 20
45 /* CCLK_DIV controls the core clock divider                             */
46 /* Values can be 1, 2, 4, or 8 ONLY                                     */
47 #define CONFIG_CCLK_DIV                 1
48 /* SCLK_DIV controls the system clock divider                           */
49 /* Values can range from 1-15                                           */
50 #define CONFIG_SCLK_DIV                 5
51
52 /*
53  * Memory Settings
54  */
55 #define CONFIG_MEM_SIZE                 32
56 #define CONFIG_MEM_ADD_WDTH             9
57
58 #define CONFIG_EBIU_SDRRC_VAL           0x2ac
59 #define CONFIG_EBIU_SDGCTL_VAL          0x91110d
60
61 #define CONFIG_EBIU_AMGCTL_VAL          0xFF
62 #define CONFIG_EBIU_AMBCTL0_VAL         0x7BB07BB0
63 #define CONFIG_EBIU_AMBCTL1_VAL         0xFFC27BB0
64
65 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)
66 #define CONFIG_SYS_MALLOC_LEN           (384 << 10)
67
68 /*
69  * Network Settings
70  */
71 #ifndef __ADSPBF534__
72 #define CONFIG_BFIN_MAC
73 #define CONFIG_NETCONSOLE       1
74 #endif
75 #ifdef CONFIG_BFIN_MAC
76 #define CONFIG_IPADDR           192.168.0.15
77 #define CONFIG_NETMASK          255.255.255.0
78 #define CONFIG_GATEWAYIP        192.168.0.1
79 #define CONFIG_SERVERIP         192.168.0.2
80 #define CONFIG_HOSTNAME         bf537-srv1
81 #endif
82
83 #define CONFIG_SYS_AUTOLOAD     "no"
84 #define CONFIG_ROOTPATH         "/romfs"
85
86 /*
87  * Flash Settings
88  */
89 /* We don't have a parallel flash chip there */
90 #define CONFIG_SYS_NO_FLASH
91
92 /*
93  * SPI Settings
94  */
95 #define CONFIG_BFIN_SPI
96 #define CONFIG_ENV_SPI_MAX_HZ   30000000
97 #define CONFIG_SF_DEFAULT_SPEED 30000000
98
99 /*
100  * Env Storage Settings
101  */
102 #define CONFIG_ENV_IS_IN_SPI_FLASH
103 #define CONFIG_ENV_OFFSET       0x10000
104 #define CONFIG_ENV_SIZE         0x10000
105 #define CONFIG_ENV_SECT_SIZE    0x10000
106 #define CONFIG_ENV_IS_EMBEDDED_IN_LDR
107
108 /*
109  * I2C settings
110  */
111 #define CONFIG_SYS_I2C
112 #define CONFIG_SYS_I2C_ADI
113 #define CONFIG_SYS_I2C_SPEED            50000
114 #define CONFIG_SYS_I2C_SLAVE            0
115
116 /*
117  * Misc Settings
118  */
119 #define CONFIG_SYS_LONGHELP             1
120 #define CONFIG_CMDLINE_EDITING  1
121 #define CONFIG_ENV_OVERWRITE    1
122
123 #define CONFIG_BAUDRATE         115200
124 #define CONFIG_UART_CONSOLE     0
125 #define CONFIG_BFIN_SERIAL
126
127 #define CONFIG_PANIC_HANG       1
128 #define CONFIG_RTC_BFIN         1
129 #define CONFIG_BOOT_RETRY_TIME  -1
130 #define CONFIG_LOADS_ECHO               1
131
132 #define CONFIG_CMD_BOOTLDR
133 #define CONFIG_CMD_DATE
134
135 #define CONFIG_BOOTCOMMAND      "run flashboot"
136 #define CONFIG_BOOTARGS "root=/dev/mtdblock0 rw"
137
138 #define BOOT_ENV_SETTINGS \
139         "update=tftpboot $(loadaddr) u-boot.ldr;" \
140                 "sf probe " __stringify(BFIN_BOOT_SPI_SSEL) ";" \
141                 "sf erase 0 0x30000;" \
142                 "sf write $(loadaddr) 0 $(filesize)" \
143         "flashboot=sf read 0x1000000 0x30000 0x320000;" \
144                 "bootm 0x1000000\0"
145 #ifdef CONFIG_BFIN_MAC
146 # define NETWORK_ENV_SETTINGS \
147         "nfsargs=setenv bootargs root=/dev/nfs rw " \
148                 "nfsroot=$(serverip):$(rootpath)\0" \
149         "addip=setenv bootargs $(bootargs) " \
150                 "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \
151                 ":$(hostname):eth0:off\0" \
152         "ramboot=tftpboot $(loadaddr) linux;" \
153                 "run ramargs;run addip;bootelf\0" \
154         "nfsboot=tftpboot $(loadaddr) linux;" \
155                 "run nfsargs;run addip;bootelf\0"
156 #else
157 # define NETWORK_ENV_SETTINGS
158 #endif
159 #define CONFIG_EXTRA_ENV_SETTINGS \
160         NETWORK_ENV_SETTINGS \
161         "ramargs=setenv bootargs " CONFIG_BOOTARGS "\0" \
162         BOOT_ENV_SETTINGS
163
164 #endif