2 * U-Boot - Configuration file for BF533 EZKIT board
5 #ifndef __CONFIG_BF533_EZKIT_H__
6 #define __CONFIG_BF533_EZKIT_H__
8 #include <asm/config-pre.h>
13 #define CONFIG_BFIN_CPU bf533-0.3
14 #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
18 * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
19 * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
21 /* CONFIG_CLKIN_HZ is any value in Hz */
22 #define CONFIG_CLKIN_HZ 27000000
23 /* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
25 #define CONFIG_CLKIN_HALF 0
26 /* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
28 #define CONFIG_PLL_BYPASS 0
29 /* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
30 /* Values can range from 0-63 (where 0 means 64) */
31 #define CONFIG_VCO_MULT 22
32 /* CCLK_DIV controls the core clock divider */
33 /* Values can be 1, 2, 4, or 8 ONLY */
34 #define CONFIG_CCLK_DIV 1
35 /* SCLK_DIV controls the system clock divider */
36 /* Values can range from 1-15 */
37 #define CONFIG_SCLK_DIV 5
42 #define CONFIG_MEM_SIZE 32
43 /* Early EZKITs had 32megs, but later have 64megs */
44 #if (CONFIG_MEM_SIZE == 64)
45 # define CONFIG_MEM_ADD_WDTH 10
47 # define CONFIG_MEM_ADD_WDTH 9
50 #define CONFIG_EBIU_SDRRC_VAL 0x398
51 #define CONFIG_EBIU_SDGCTL_VAL 0x91118d
53 #define CONFIG_EBIU_AMGCTL_VAL 0xFF
54 #define CONFIG_EBIU_AMBCTL0_VAL 0x7BB07BB0
55 #define CONFIG_EBIU_AMBCTL1_VAL 0xFFC27BB0
57 #define CONFIG_SYS_MONITOR_LEN (256 * 1024)
58 #define CONFIG_SYS_MALLOC_LEN (128 * 1024)
63 #define ADI_CMDS_NETWORK 1
64 #define CONFIG_SMC91111 1
65 #define CONFIG_SMC91111_BASE 0x20310300
66 #define SMC91111_EEPROM_INIT() \
68 bfin_write_FIO_DIR(bfin_read_FIO_DIR() | PF1 | PF0); \
69 bfin_write_FIO_FLAG_C(PF1); \
70 bfin_write_FIO_FLAG_S(PF0); \
73 #define CONFIG_HOSTNAME bf533-ezkit
78 #define CONFIG_SYS_FLASH_BASE 0x20000000
79 #define CONFIG_SYS_MAX_FLASH_BANKS 3
80 #define CONFIG_SYS_MAX_FLASH_SECT 40
81 #define CONFIG_ENV_IS_IN_FLASH
82 #define CONFIG_ENV_ADDR 0x20030000
83 #define CONFIG_ENV_SECT_SIZE 0x10000
84 #define FLASH_TOT_SECT 40
89 #define CONFIG_SYS_I2C_SOFT
90 #ifdef CONFIG_SYS_I2C_SOFT
91 #define CONFIG_SYS_I2C
92 #define CONFIG_SOFT_I2C_GPIO_SCL GPIO_PF0
93 #define CONFIG_SOFT_I2C_GPIO_SDA GPIO_PF1
94 #define CONFIG_SYS_I2C_SOFT_SPEED 50000
95 #define CONFIG_SYS_I2C_SOFT_SLAVE 0
96 #define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
102 #define CONFIG_MISC_INIT_R
103 #define CONFIG_RTC_BFIN
104 #define CONFIG_UART_CONSOLE 0
107 * Pull in common ADI header for remaining command/environment setup
109 #include <configs/bfin_adi_common.h>