2 * U-Boot - Configuration file for BF506F EZ-Kit board
5 #ifndef __CONFIG_BF506F_EZKIT_H__
6 #define __CONFIG_BF506F_EZKIT_H__
8 #include <asm/config-pre.h>
13 #define CONFIG_BFIN_CPU bf506-0.0
14 #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
18 * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
19 * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
21 /* CONFIG_CLKIN_HZ is any value in Hz */
22 #define CONFIG_CLKIN_HZ 25000000
23 /* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
25 #define CONFIG_CLKIN_HALF 0
26 /* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
28 #define CONFIG_PLL_BYPASS 0
29 /* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
30 /* Values can range from 0-63 (where 0 means 64) */
31 #define CONFIG_VCO_MULT 16
32 /* CCLK_DIV controls the core clock divider */
33 /* Values can be 1, 2, 4, or 8 ONLY */
34 #define CONFIG_CCLK_DIV 1
35 /* SCLK_DIV controls the system clock divider */
36 /* Values can range from 1-15 */
37 #define CONFIG_SCLK_DIV 5
42 #define CONFIG_MEM_SIZE 0
44 #define CONFIG_EBIU_AMGCTL_VAL (AMCKEN | AMBEN_ALL)
45 #define CONFIG_EBIU_AMBCTL0_VAL 0xffc2ffc2
46 #define CONFIG_EBIU_AMBCTL1_VAL 0xffc2ffc2
48 #define CONFIG_SYS_MONITOR_BASE (L1_DATA_A_SRAM_END)
49 #define CONFIG_SYS_MONITOR_LEN (4 * 1024)
50 #define CONFIG_SYS_MALLOC_LEN (4 * 1024)
56 #define CONFIG_FLASH_CFI_DRIVER
57 #define CONFIG_SYS_FLASH_BASE 0x20000000
58 #define CONFIG_SYS_FLASH_CFI
59 #define CONFIG_SYS_MAX_FLASH_BANKS 1
60 #define CONFIG_SYS_MAX_FLASH_SECT 71
61 #define CONFIG_MONITOR_IS_IN_RAM
63 #define CONFIG_SYS_NO_FLASH
68 #define CONFIG_BFIN_SPI
69 #define CONFIG_ENV_SPI_MAX_HZ 30000000
70 #define CONFIG_SF_DEFAULT_SPEED 30000000
73 * Env Storage Settings
75 #define CONFIG_ENV_IS_NOWHERE
76 #define CONFIG_ENV_SIZE 0x400
81 #define CONFIG_ICACHE_OFF
82 #define CONFIG_DCACHE_OFF
83 #define CONFIG_UART_CONSOLE 0
84 #define CONFIG_BAUDRATE 115200
85 #define CONFIG_BFIN_SERIAL
89 #undef CONFIG_BOOTM_RTEMS
90 #undef CONFIG_BOOTM_LINUX