1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2013-2016 Synopsys, Inc. All rights reserved.
6 #ifndef _CONFIG_AXS10X_H_
7 #define _CONFIG_AXS10X_H_
9 #include <linux/sizes.h>
13 #define ARC_FPGA_PERIPHERAL_BASE 0xE0000000
14 #define ARC_APB_PERIPHERAL_BASE 0xF0000000
15 #define ARC_DWMMC_BASE (ARC_FPGA_PERIPHERAL_BASE + 0x15000)
16 #define ARC_DWGMAC_BASE (ARC_FPGA_PERIPHERAL_BASE + 0x18000)
19 * Memory configuration
21 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
23 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
24 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
25 #define CONFIG_SYS_SDRAM_SIZE SZ_512M
27 #define CONFIG_SYS_INIT_SP_ADDR \
28 (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
30 #define CONFIG_SYS_MALLOC_LEN SZ_2M
31 #define CONFIG_SYS_BOOTM_LEN SZ_128M
32 #define CONFIG_SYS_LOAD_ADDR 0x82000000
35 * This board might be of different versions so handle it
37 #define CONFIG_BOARD_TYPES
40 * NAND Flash configuration
42 #define CONFIG_SYS_NAND_BASE (ARC_FPGA_PERIPHERAL_BASE + 0x16000)
43 #define CONFIG_SYS_MAX_NAND_DEVICE 1
48 #define CONFIG_SYS_NS16550_SERIAL
49 #define CONFIG_SYS_NS16550_CLK 33333333
50 #define CONFIG_SYS_NS16550_MEM32
53 * Ethernet PHY configuration
57 * USB 1.1 configuration
59 #define CONFIG_USB_OHCI_NEW
60 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
63 * Environment settings
65 #define CONFIG_EXTRA_ENV_SETTINGS \
66 "upgrade=if mmc rescan && " \
67 "fatload mmc 0:1 ${loadaddr} u-boot-update.img && " \
68 "iminfo ${loadaddr} && source ${loadaddr}; then; else echo " \
69 "\"Fail to upgrade.\n" \
70 "Do you have u-boot-update.img and u-boot.head on first (FAT) SD card partition?\"" \
74 * Environment configuration
76 #define CONFIG_BOOTFILE "uImage"
77 #define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
80 * Console configuration
83 #endif /* _CONFIG_AXS10X_H_ */