2 * Copyright (C) 2013-2016 Synopsys, Inc. All rights reserved.
4 * SPDX-License-Identifier: GPL-2.0+
7 #ifndef _CONFIG_AXS10X_H_
8 #define _CONFIG_AXS10X_H_
10 #include <linux/sizes.h>
14 #define ARC_FPGA_PERIPHERAL_BASE 0xE0000000
15 #define ARC_APB_PERIPHERAL_BASE 0xF0000000
16 #define ARC_DWMMC_BASE (ARC_FPGA_PERIPHERAL_BASE + 0x15000)
17 #define ARC_DWGMAC_BASE (ARC_FPGA_PERIPHERAL_BASE + 0x18000)
20 * Memory configuration
22 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
24 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
25 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
26 #define CONFIG_SYS_SDRAM_SIZE SZ_512M
28 #define CONFIG_SYS_INIT_SP_ADDR \
29 (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
31 #define CONFIG_SYS_MALLOC_LEN SZ_2M
32 #define CONFIG_SYS_BOOTM_LEN SZ_128M
33 #define CONFIG_SYS_LOAD_ADDR 0x82000000
36 * This board might be of different versions so handle it
38 #define CONFIG_BOARD_TYPES
41 * NAND Flash configuration
43 #define CONFIG_SYS_NAND_BASE (ARC_FPGA_PERIPHERAL_BASE + 0x16000)
44 #define CONFIG_SYS_MAX_NAND_DEVICE 1
49 #define CONFIG_DW_SERIAL
50 #define CONFIG_SYS_NS16550_SERIAL
51 #define CONFIG_SYS_NS16550_CLK 33333333
52 #define CONFIG_SYS_NS16550_MEM32
55 * Ethernet PHY configuration
60 * USB 1.1 configuration
62 #define CONFIG_USB_OHCI_NEW
63 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
66 * Environment settings
68 #define CONFIG_ENV_SIZE SZ_16K
71 * Environment configuration
73 #define CONFIG_BOOTFILE "uImage"
74 #define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
77 * Console configuration
81 * Misc utility configuration
83 #define CONFIG_BOUNCE_BUFFER
85 #endif /* _CONFIG_AXS10X_H_ */