1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2017 Andes Technology Corporation
4 * Rick Chen, Andes Technology Corporation <rick@andestech.com>
10 #define RISCV_MMODE_TIMERBASE 0xe6000000
11 #define RISCV_MMODE_TIMER_FREQ 60000000
13 #define RISCV_SMODE_TIMER_FREQ 60000000
16 * CPU and Board Configuration Options
20 * Miscellaneous configurable options
26 #define PHYS_SDRAM_0 0x00000000 /* SDRAM Bank #1 */
27 #define PHYS_SDRAM_1 \
28 (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) /* SDRAM Bank #2 */
29 #define PHYS_SDRAM_0_SIZE 0x20000000 /* 512 MB */
30 #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512 MB */
31 #define CFG_SYS_SDRAM_BASE PHYS_SDRAM_0
34 * Serial console configuration
36 #define CFG_SYS_NS16550_CLK 19660800
38 /* Init Stack Pointer */
41 #define PHYS_FLASH_1 0x88000000 /* BANK 0 */
42 #define CFG_SYS_FLASH_BASE PHYS_FLASH_1
43 #define CFG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, }
45 /* max number of memory banks */
47 * There are 4 banks supported for this Controller,
48 * but we have only 1 bank connected to flash on board
50 #define CFG_SYS_FLASH_BANKS_SIZES {0x4000000}
57 * For booting Linux, the board info and command line data
58 * have to be in the first 16 MB of memory, since this is
59 * the maximum mapped by the Linux kernel during initialization.
62 /* Initial Memory map for Linux*/
63 #define CFG_SYS_BOOTMAPSZ (64 << 20)
64 /* Increase max gunzip size */
66 /* Support autoboot from RAM (kernel image is loaded via debug port) */
67 #define KERNEL_IMAGE_ADDR "0x2000000 "
68 #define BOOTENV_DEV_NAME_RAM(devtypeu, devtypel, instance) \
70 #define BOOTENV_DEV_RAM(devtypeu, devtypel, instance) \
76 /* When we use RAM as ENV */
78 /* Enable distro boot */
79 #define BOOT_TARGET_DEVICES(func) \
81 func(DHCP, dhcp, na) \
83 #include <config_distro_bootcmd.h>
85 #define CFG_EXTRA_ENV_SETTINGS \
86 "kernel_addr_r=0x00080000\0" \
87 "pxefile_addr_r=0x01f00000\0" \
88 "scriptaddr=0x01f00000\0" \
89 "fdt_addr_r=0x02000000\0" \
90 "ramdisk_addr_r=0x02800000\0" \
93 #endif /* __CONFIG_H */