include/configs/at91sam9x5ek.h

   1 /*
   2  * Copyright (C) 2012 Atmel Corporation
   3  *
   4  * Configuation settings for the AT91SAM9X5EK board.
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 #ifndef __CONFIG_H__
  10 #define __CONFIG_H__
  11
  12 #define CONFIG_SYS_TEXT_BASE            0x26f00000
  13
  14 /* ARM asynchronous clock */
  15 #define CONFIG_SYS_AT91_SLOW_CLOCK      32768
  16 #define CONFIG_SYS_AT91_MAIN_CLOCK      12000000        /* 12 MHz crystal */
  17
  18 #define CONFIG_AT91SAM9X5EK
  19
  20 #define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs */
  21 #define CONFIG_SETUP_MEMORY_TAGS
  22 #define CONFIG_INITRD_TAG
  23 #define CONFIG_SKIP_LOWLEVEL_INIT
  24
  25 /* general purpose I/O */
  26 #define CONFIG_ATMEL_LEGACY             /* required until (g)pio is fixed */
  27
  28 /* LCD */
  29 #define LCD_BPP                 LCD_COLOR16
  30 #define LCD_OUTPUT_BPP          24
  31 #define CONFIG_LCD_LOGO
  32 #define CONFIG_LCD_INFO
  33 #define CONFIG_LCD_INFO_BELOW_LOGO
  34 #define CONFIG_ATMEL_HLCD
  35 #define CONFIG_ATMEL_LCD_RGB565
  36
  37
  38 /*
  39  * BOOTP options
  40  */
  41 #define CONFIG_BOOTP_BOOTFILESIZE
  42 #define CONFIG_BOOTP_BOOTPATH
  43 #define CONFIG_BOOTP_GATEWAY
  44 #define CONFIG_BOOTP_HOSTNAME
  45
  46 /*
  47  * define CONFIG_USB_EHCI_HCD to enable USB Hi-Speed (aka 2.0)
  48  * NB: in this case, USB 1.1 devices won't be recognized.
  49  */
  50
  51 /* SDRAM */
  52 #define CONFIG_NR_DRAM_BANKS            1
  53 #define CONFIG_SYS_SDRAM_BASE           0x20000000
  54 #define CONFIG_SYS_SDRAM_SIZE           0x08000000      /* 128 megs */
  55
  56 #define CONFIG_SYS_INIT_SP_ADDR \
  57         (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
  58
  59 /* DataFlash */
  60 #ifdef CONFIG_CMD_SF
  61 #define CONFIG_SF_DEFAULT_SPEED         30000000
  62 #endif
  63
  64 /* NAND flash */
  65 #ifdef CONFIG_CMD_NAND
  66 #define CONFIG_NAND_ATMEL
  67 #define CONFIG_SYS_MAX_NAND_DEVICE      1
  68 #define CONFIG_SYS_NAND_BASE            0x40000000
  69 #define CONFIG_SYS_NAND_DBW_8           1
  70 /* our ALE is AD21 */
  71 #define CONFIG_SYS_NAND_MASK_ALE        (1 << 21)
  72 /* our CLE is AD22 */
  73 #define CONFIG_SYS_NAND_MASK_CLE        (1 << 22)
  74 #define CONFIG_SYS_NAND_ENABLE_PIN      AT91_PIN_PD4
  75 #define CONFIG_SYS_NAND_READY_PIN       AT91_PIN_PD5
  76
  77 #define CONFIG_MTD_DEVICE
  78 #define CONFIG_MTD_PARTITIONS
  79 #endif
  80
  81 /* PMECC & PMERRLOC */
  82 #define CONFIG_ATMEL_NAND_HWECC         1
  83 #define CONFIG_ATMEL_NAND_HW_PMECC      1
  84 #define CONFIG_PMECC_CAP                2
  85 #define CONFIG_PMECC_SECTOR_SIZE        512
  86
  87 /* USB */
  88 #ifdef CONFIG_CMD_USB
  89 #ifndef CONFIG_USB_EHCI_HCD
  90 #define CONFIG_USB_ATMEL
  91 #define CONFIG_USB_ATMEL_CLK_SEL_UPLL
  92 #define CONFIG_USB_OHCI_NEW
  93 #define CONFIG_SYS_USB_OHCI_CPU_INIT
  94 #define CONFIG_SYS_USB_OHCI_REGS_BASE           ATMEL_BASE_OHCI
  95 #define CONFIG_SYS_USB_OHCI_SLOT_NAME           "at91sam9x5"
  96 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      3
  97 #endif
  98 #endif
  99
 100 #define CONFIG_SYS_LOAD_ADDR            0x22000000      /* load address */
 101
 102 #define CONFIG_SYS_MEMTEST_START        CONFIG_SYS_SDRAM_BASE
 103 #define CONFIG_SYS_MEMTEST_END          0x26e00000
 104
 105 #ifdef CONFIG_SYS_USE_NANDFLASH
 106 /* bootstrap + u-boot + env + linux in nandflash */
 107 #define CONFIG_ENV_OFFSET               0x120000
 108 #define CONFIG_ENV_OFFSET_REDUND        0x100000
 109 #define CONFIG_ENV_SIZE         0x20000         /* 1 sector = 128 kB */
 110 #define CONFIG_BOOTCOMMAND      "nand read " \
 111                                 "0x22000000 0x200000 0x300000; " \
 112                                 "bootm 0x22000000"
 113 #elif defined(CONFIG_SYS_USE_SPIFLASH)
 114 /* bootstrap + u-boot + env + linux in spi flash */
 115 #define CONFIG_ENV_OFFSET       0x5000
 116 #define CONFIG_ENV_SIZE         0x3000
 117 #define CONFIG_ENV_SECT_SIZE    0x1000
 118 #define CONFIG_ENV_SPI_MAX_HZ   30000000
 119 #define CONFIG_BOOTCOMMAND      "sf probe 0; " \
 120                                 "sf read 0x22000000 0x100000 0x300000; " \
 121                                 "bootm 0x22000000"
 122 #elif defined(CONFIG_SYS_USE_DATAFLASH)
 123 /* bootstrap + u-boot + env + linux in data flash */
 124 #define CONFIG_ENV_OFFSET       0x4200
 125 #define CONFIG_ENV_SIZE         0x4200
 126 #define CONFIG_ENV_SECT_SIZE    0x210
 127 #define CONFIG_ENV_SPI_MAX_HZ   30000000
 128 #define CONFIG_BOOTCOMMAND      "sf probe 0; " \
 129                                 "sf read 0x22000000 0x84000 0x294000; " \
 130                                 "bootm 0x22000000"
 131 #else /* CONFIG_SYS_USE_MMC */
 132 /* bootstrap + u-boot + env + linux in mmc */
 133 #define CONFIG_ENV_SIZE         0x4000
 134 #endif
 135
 136 #define CONFIG_SYS_LONGHELP
 137 #define CONFIG_CMDLINE_EDITING
 138 #define CONFIG_AUTO_COMPLETE
 139
 140 /*
 141  * Size of malloc() pool
 142  */
 143 #define CONFIG_SYS_MALLOC_LEN           (512 * 1024 + 0x1000)
 144
 145 /* SPL */
 146 #define CONFIG_SPL_FRAMEWORK
 147 #define CONFIG_SPL_TEXT_BASE            0x300000
 148 #define CONFIG_SPL_MAX_SIZE             0x6000
 149 #define CONFIG_SPL_STACK                0x308000
 150
 151 #define CONFIG_SPL_BSS_START_ADDR       0x20000000
 152 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
 153 #define CONFIG_SYS_SPL_MALLOC_START     0x20080000
 154 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x80000
 155
 156 #define CONFIG_SYS_MONITOR_LEN          (512 << 10)
 157
 158 #define CONFIG_SYS_MASTER_CLOCK         132096000
 159 #define CONFIG_SYS_AT91_PLLA            0x20c73f03
 160 #define CONFIG_SYS_MCKR                 0x1301
 161 #define CONFIG_SYS_MCKR_CSS             0x1302
 162
 163 #ifdef CONFIG_SYS_USE_MMC
 164 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION      1
 165 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME         "u-boot.img"
 166
 167 #elif CONFIG_SYS_USE_NANDFLASH
 168 #define CONFIG_SPL_NAND_DRIVERS
 169 #define CONFIG_SPL_NAND_BASE
 170 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x40000
 171 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 172 #define CONFIG_SYS_NAND_PAGE_SIZE       0x800
 173 #define CONFIG_SYS_NAND_PAGE_COUNT      64
 174 #define CONFIG_SYS_NAND_OOBSIZE         64
 175 #define CONFIG_SYS_NAND_BLOCK_SIZE      0x20000
 176 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0x0
 177 #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
 178
 179 #elif CONFIG_SYS_USE_SPIFLASH
 180 #define CONFIG_SPL_SPI_LOAD
 181 #define CONFIG_SYS_SPI_U_BOOT_OFFS      0x8400
 182
 183 #endif
 184
 185 #endif