1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2012 Atmel Corporation
5 * Configuation settings for the AT91SAM9X5EK board.
11 /* ARM asynchronous clock */
12 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768
13 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
15 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
16 #define CONFIG_SETUP_MEMORY_TAGS
17 #define CONFIG_INITRD_TAG
19 /* general purpose I/O */
20 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
25 #define CONFIG_BOOTP_BOOTFILESIZE
28 * define CONFIG_USB_EHCI_HCD to enable USB Hi-Speed (aka 2.0)
29 * NB: in this case, USB 1.1 devices won't be recognized.
33 #define CONFIG_SYS_SDRAM_BASE 0x20000000
34 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */
36 #define CONFIG_SYS_INIT_SP_ADDR \
37 (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
42 #ifdef CONFIG_CMD_NAND
43 #define CONFIG_SYS_MAX_NAND_DEVICE 1
44 #define CONFIG_SYS_NAND_BASE 0x40000000
45 #define CONFIG_SYS_NAND_DBW_8 1
47 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
49 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
50 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4
51 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5
56 #ifndef CONFIG_USB_EHCI_HCD
57 #define CONFIG_USB_ATMEL
58 #define CONFIG_USB_ATMEL_CLK_SEL_UPLL
59 #define CONFIG_USB_OHCI_NEW
60 #define CONFIG_SYS_USB_OHCI_CPU_INIT
61 #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
62 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9x5"
63 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3
67 #ifdef CONFIG_NAND_BOOT
68 /* bootstrap + u-boot + env + linux in nandflash */
69 #define CONFIG_BOOTCOMMAND "nand read " \
70 "0x22000000 0x200000 0x600000; " \
71 "nand read 0x21000000 0x180000 0x20000; " \
72 "bootz 0x22000000 - 0x21000000"
73 #elif defined(CONFIG_SPI_BOOT)
74 /* bootstrap + u-boot + env + linux in spi flash */
75 #define CONFIG_BOOTCOMMAND "sf probe 0; " \
76 "sf read 0x22000000 0x100000 0x300000; " \
78 #elif defined(CONFIG_SYS_USE_DATAFLASH)
79 /* bootstrap + u-boot + env + linux in data flash */
80 #define CONFIG_BOOTCOMMAND "sf probe 0; " \
81 "sf read 0x22000000 0x84000 0x294000; " \
86 #define CONFIG_SPL_MAX_SIZE 0x6000
87 #define CONFIG_SPL_STACK 0x308000
89 #define CONFIG_SPL_BSS_START_ADDR 0x20000000
90 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
91 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000
92 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
94 #define CONFIG_SYS_MONITOR_LEN (512 << 10)
96 #define CONFIG_SYS_MASTER_CLOCK 132096000
97 #define CONFIG_SYS_AT91_PLLA 0x20c73f03
98 #define CONFIG_SYS_MCKR 0x1301
99 #define CONFIG_SYS_MCKR_CSS 0x1302
101 #ifdef CONFIG_SD_BOOT
102 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
104 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
105 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
106 #define CONFIG_SYS_NAND_PAGE_SIZE 0x800
107 #define CONFIG_SYS_NAND_PAGE_COUNT 64
108 #define CONFIG_SYS_NAND_OOBSIZE 64
109 #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
110 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0