1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2007-2008
4 * Stelian Pop <stelian@popies.net>
5 * Lead Tech Design <www.leadtechdesign.com>
7 * Configuation settings for the AT91SAM9RLEK board.
13 #include <asm/hardware.h>
15 /* ARM asynchronous clock */
16 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
17 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* main clock xtal */
24 #define LCD_BPP LCD_COLOR8
25 /* Let board_init_f handle the framebuffer allocation */
29 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
30 #define CONFIG_SYS_SDRAM_SIZE 0x04000000
32 #define CONFIG_SYS_INIT_SP_ADDR \
33 (ATMEL_BASE_SRAM + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
36 #ifdef CONFIG_CMD_NAND
37 #define CONFIG_SYS_MAX_NAND_DEVICE 1
38 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
39 #define CONFIG_SYS_NAND_DBW_8 1
41 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
43 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
44 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PB6
45 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD17