1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2007-2008
4 * Stelian Pop <stelian@popies.net>
5 * Lead Tech Design <www.leadtechdesign.com>
7 * Configuation settings for the AT91SAM9RLEK board.
13 #include <asm/hardware.h>
15 /* ARM asynchronous clock */
16 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
17 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* main clock xtal */
19 #define CONFIG_ATMEL_LEGACY
26 #define LCD_BPP LCD_COLOR8
27 #define CONFIG_LCD_LOGO 1
28 #undef LCD_TEST_PATTERN
29 #define CONFIG_LCD_INFO 1
30 #define CONFIG_LCD_INFO_BELOW_LOGO 1
31 #define CONFIG_ATMEL_LCD 1
32 #define CONFIG_ATMEL_LCD_RGB565 1
33 /* Let board_init_f handle the framebuffer allocation */
37 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
38 #define CONFIG_SYS_SDRAM_SIZE 0x04000000
40 #define CONFIG_SYS_INIT_SP_ADDR \
41 (ATMEL_BASE_SRAM + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
44 #ifdef CONFIG_CMD_NAND
45 #define CONFIG_SYS_MAX_NAND_DEVICE 1
46 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
47 #define CONFIG_SYS_NAND_DBW_8 1
49 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
51 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
52 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PB6
53 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD17
57 /* Ethernet - not present */
59 #ifdef CONFIG_SYS_USE_DATAFLASH
61 /* bootstrap + u-boot + env + linux in dataflash on CS0 */
62 #define CONFIG_BOOTCOMMAND "sf probe 0; " \
63 "sf read 0x22000000 0x84000 0x294000; " \
66 #elif CONFIG_SYS_USE_NANDFLASH
68 /* bootstrap + u-boot + env + linux in nandflash */
69 #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x600000; " \
70 "nand read 0x21000000 0x180000 0x80000; " \
71 "bootz 0x22000000 - 0x21000000"
73 #else /* CONFIG_SYS_USE_MMC */
75 /* bootstrap + u-boot + env + linux in mmc */
76 #define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 at91sam9rlek.dtb; " \
77 "fatload mmc 0:1 0x22000000 zImage; " \
78 "bootz 0x22000000 - 0x21000000"