include/configs/at91sam9n12ek.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * (C) Copyright 2013 Atmel Corporation.
   4  * Josh Wu <josh.wu@atmel.com>
   5  *
   6  * Configuation settings for the AT91SAM9N12-EK boards.
   7  */
   8
   9 #ifndef __AT91SAM9N12_CONFIG_H_
  10 #define __AT91SAM9N12_CONFIG_H_
  11
  12 /* ARM asynchronous clock */
  13 #define CONFIG_SYS_AT91_SLOW_CLOCK      32768           /* slow clock xtal */
  14 #define CONFIG_SYS_AT91_MAIN_CLOCK      16000000        /* main clock xtal */
  15
  16 /* Misc CPU related */
  17
  18 /* LCD */
  19 #define LCD_BPP                         LCD_COLOR16
  20 #define LCD_OUTPUT_BPP                  24
  21
  22 #define CONFIG_SYS_SDRAM_BASE           0x20000000
  23 #define CONFIG_SYS_SDRAM_SIZE           0x08000000
  24
  25 /*
  26  * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
  27  * leaving the correct space for initial global data structure above
  28  * that address while providing maximum stack area below.
  29  */
  30 # define CONFIG_SYS_INIT_SP_ADDR \
  31         (0x00300000 + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
  32
  33 /* DataFlash */
  34
  35 /* NAND flash */
  36 #ifdef CONFIG_CMD_NAND
  37 #define CONFIG_SYS_MAX_NAND_DEVICE      1
  38 #define CONFIG_SYS_NAND_BASE            0x40000000
  39 #define CONFIG_SYS_NAND_MASK_ALE        (1 << 21)
  40 #define CONFIG_SYS_NAND_MASK_CLE        (1 << 22)
  41 #define CONFIG_SYS_NAND_ENABLE_PIN      GPIO_PIN_PD(4)
  42 #define CONFIG_SYS_NAND_READY_PIN       GPIO_PIN_PD(5)
  43 #endif
  44
  45 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
  46         "console=console=ttyS0,115200\0"                                \
  47         "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0"                                  \
  48         "bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\
  49         "bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0"
  50
  51 /* USB host */
  52 #ifdef CONFIG_CMD_USB
  53 #define CONFIG_USB_ATMEL
  54 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
  55 #define CONFIG_USB_OHCI_NEW
  56 #define CONFIG_SYS_USB_OHCI_CPU_INIT
  57 #define CONFIG_SYS_USB_OHCI_REGS_BASE   ATMEL_BASE_OHCI
  58 #define CONFIG_SYS_USB_OHCI_SLOT_NAME   "at91sam9n12"
  59 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      1
  60 #endif
  61
  62 /* SPL */
  63 #define CONFIG_SPL_STACK                0x308000
  64
  65 #define CONFIG_SPL_BSS_START_ADDR       0x20000000
  66 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
  67 #define CONFIG_SYS_SPL_MALLOC_START     0x20080000
  68 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x80000
  69
  70 #define CONFIG_SYS_MONITOR_LEN          (512 << 10)
  71
  72 #define CONFIG_SYS_MASTER_CLOCK         132096000
  73 #define CONFIG_SYS_AT91_PLLA            0x20953f03
  74 #define CONFIG_SYS_MCKR                 0x1301
  75 #define CONFIG_SYS_MCKR_CSS             0x1302
  76
  77 #endif