1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2013 Atmel Corporation.
4 * Josh Wu <josh.wu@atmel.com>
6 * Configuation settings for the AT91SAM9N12-EK boards.
9 #ifndef __AT91SAM9N12_CONFIG_H_
10 #define __AT91SAM9N12_CONFIG_H_
12 /* ARM asynchronous clock */
13 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
14 #define CONFIG_SYS_AT91_MAIN_CLOCK 16000000 /* main clock xtal */
16 /* Misc CPU related */
17 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
18 #define CONFIG_SETUP_MEMORY_TAGS
19 #define CONFIG_INITRD_TAG
20 #define CONFIG_SKIP_LOWLEVEL_INIT
23 #define LCD_BPP LCD_COLOR16
24 #define LCD_OUTPUT_BPP 24
25 #define CONFIG_LCD_LOGO
26 #define CONFIG_LCD_INFO
27 #define CONFIG_LCD_INFO_BELOW_LOGO
28 #define CONFIG_ATMEL_HLCD
29 #define CONFIG_ATMEL_LCD_RGB565
34 #define CONFIG_BOOTP_BOOTFILESIZE
36 #define CONFIG_SYS_SDRAM_BASE 0x20000000
37 #define CONFIG_SYS_SDRAM_SIZE 0x08000000
40 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
41 * leaving the correct space for initial global data structure above
42 * that address while providing maximum stack area below.
44 # define CONFIG_SYS_INIT_SP_ADDR \
45 (0x00300000 + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
50 #ifdef CONFIG_CMD_NAND
51 #define CONFIG_SYS_MAX_NAND_DEVICE 1
52 #define CONFIG_SYS_NAND_BASE 0x40000000
53 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
54 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
55 #define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(4)
56 #define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(5)
59 #define CONFIG_EXTRA_ENV_SETTINGS \
60 "console=console=ttyS0,115200\0" \
61 "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" \
62 "bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\
63 "bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0"
66 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
70 #define CONFIG_USB_ATMEL
71 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
72 #define CONFIG_USB_OHCI_NEW
73 #define CONFIG_SYS_USB_OHCI_CPU_INIT
74 #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
75 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9n12"
76 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
79 #ifdef CONFIG_SPI_BOOT
81 /* bootstrap + u-boot + env + linux in dataflash on CS0 */
82 #define CONFIG_BOOTCOMMAND \
83 "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \
84 "sf probe 0; sf read 0x22000000 0x100000 0x300000; " \
87 #elif defined(CONFIG_NAND_BOOT)
89 /* bootstrap + u-boot + env + linux in nandflash */
90 #define CONFIG_BOOTCOMMAND \
91 "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \
92 "nand read 0x21000000 0x180000 0x080000;" \
93 "nand read 0x22000000 0x200000 0x400000;" \
94 "bootm 0x22000000 - 0x21000000"
96 #else /* CONFIG_SD_BOOT */
98 /* bootstrap + u-boot + env + linux in mmc */
100 #ifdef CONFIG_ENV_IS_IN_MMC
101 /* Use raw reserved sectors to save environment */
102 #define CONFIG_SYS_MMC_ENV_DEV 0
104 /* Use file in FAT file to save environment */
107 #define CONFIG_BOOTCOMMAND \
108 "setenv bootargs ${console} ${mtdparts} ${bootargs_mmc};" \
109 "fatload mmc 0:1 0x21000000 dtb;" \
110 "fatload mmc 0:1 0x22000000 uImage;" \
111 "bootm 0x22000000 - 0x21000000"
116 * Size of malloc() pool
118 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
121 #define CONFIG_SPL_MAX_SIZE 0x6000
122 #define CONFIG_SPL_STACK 0x308000
124 #define CONFIG_SPL_BSS_START_ADDR 0x20000000
125 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
126 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000
127 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
129 #define CONFIG_SYS_MONITOR_LEN (512 << 10)
131 #define CONFIG_SYS_MASTER_CLOCK 132096000
132 #define CONFIG_SYS_AT91_PLLA 0x20953f03
133 #define CONFIG_SYS_MCKR 0x1301
134 #define CONFIG_SYS_MCKR_CSS 0x1302
136 #ifdef CONFIG_SD_BOOT
137 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
138 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
139 #elif CONFIG_NAND_BOOT
140 #define CONFIG_SPL_NAND_DRIVERS
141 #define CONFIG_SPL_NAND_BASE
143 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
144 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
145 #define CONFIG_SYS_NAND_PAGE_SIZE 0x800
146 #define CONFIG_SYS_NAND_PAGE_COUNT 64
147 #define CONFIG_SYS_NAND_OOBSIZE 64
148 #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
149 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0