1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2007-2008
4 * Stelian Pop <stelian@popies.net>
5 * Lead Tech Design <www.leadtechdesign.com>
7 * Configuation settings for the AT91SAM9M10G45EK board(and AT91SAM9G45EKES).
13 /* ARM asynchronous clock */
14 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768
15 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
17 /* general purpose I/O */
20 #define LCD_BPP LCD_COLOR8
23 #define CONFIG_SYS_SDRAM_BASE 0x70000000
24 #define CONFIG_SYS_SDRAM_SIZE 0x08000000
27 #ifdef CONFIG_CMD_NAND
28 #define CONFIG_SYS_MAX_NAND_DEVICE 1
29 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
30 #define CONFIG_SYS_NAND_DBW_8
32 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
34 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
35 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
36 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8
40 #define CONFIG_SYS_MONITOR_LEN 0x80000
43 #elif CONFIG_NAND_BOOT
44 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
46 #define CONFIG_SYS_NAND_ECCSIZE 256
47 #define CONFIG_SYS_NAND_ECCBYTES 3
48 #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
49 48, 49, 50, 51, 52, 53, 54, 55, \
50 56, 57, 58, 59, 60, 61, 62, 63, }
53 #define CONFIG_SYS_MASTER_CLOCK 132096000
54 #define CONFIG_SYS_AT91_PLLA 0x20c73f03
55 #define CONFIG_SYS_MCKR 0x1301
56 #define CONFIG_SYS_MCKR_CSS 0x1302