include/configs/at91sam9m10g45ek.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * (C) Copyright 2007-2008
   4  * Stelian Pop <stelian@popies.net>
   5  * Lead Tech Design <www.leadtechdesign.com>
   6  *
   7  * Configuation settings for the AT91SAM9M10G45EK board(and AT91SAM9G45EKES).
   8  */
   9
  10 #ifndef __CONFIG_H
  11 #define __CONFIG_H
  12
  13 /* ARM asynchronous clock */
  14 #define CONFIG_SYS_AT91_SLOW_CLOCK      32768
  15 #define CONFIG_SYS_AT91_MAIN_CLOCK      12000000 /* from 12 MHz crystal */
  16
  17 /* general purpose I/O */
  18
  19 /* LCD */
  20 #define LCD_BPP                         LCD_COLOR8
  21
  22 /* SDRAM */
  23 #define CONFIG_SYS_SDRAM_BASE           0x70000000
  24 #define CONFIG_SYS_SDRAM_SIZE           0x08000000
  25
  26 /* NAND flash */
  27 #ifdef CONFIG_CMD_NAND
  28 #define CONFIG_SYS_MAX_NAND_DEVICE              1
  29 #define CONFIG_SYS_NAND_BASE                    ATMEL_BASE_CS3
  30 #define CONFIG_SYS_NAND_DBW_8
  31 /* our ALE is AD21 */
  32 #define CONFIG_SYS_NAND_MASK_ALE                (1 << 21)
  33 /* our CLE is AD22 */
  34 #define CONFIG_SYS_NAND_MASK_CLE                (1 << 22)
  35 #define CONFIG_SYS_NAND_ENABLE_PIN              AT91_PIN_PC14
  36 #define CONFIG_SYS_NAND_READY_PIN               AT91_PIN_PC8
  37
  38 #endif
  39
  40 /* Defines for SPL */
  41 #define CONFIG_SPL_STACK                0x310000
  42
  43 #define CONFIG_SYS_MONITOR_LEN          0x80000
  44
  45 #ifdef CONFIG_SD_BOOT
  46
  47 #define CONFIG_SPL_BSS_START_ADDR       0x70000000
  48 #define CONFIG_SYS_SPL_MALLOC_START     0x70080000
  49 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x00080000
  50
  51 #elif CONFIG_NAND_BOOT
  52 #define CONFIG_SYS_NAND_U_BOOT_SIZE     0x80000
  53
  54 #define CONFIG_SYS_NAND_ECCSIZE         256
  55 #define CONFIG_SYS_NAND_ECCBYTES        3
  56 #define CONFIG_SYS_NAND_ECCPOS          { 40, 41, 42, 43, 44, 45, 46, 47, \
  57                                           48, 49, 50, 51, 52, 53, 54, 55, \
  58                                           56, 57, 58, 59, 60, 61, 62, 63, }
  59 #endif
  60
  61 #define CONFIG_SYS_MASTER_CLOCK         132096000
  62 #define CONFIG_SYS_AT91_PLLA            0x20c73f03
  63 #define CONFIG_SYS_MCKR                 0x1301
  64 #define CONFIG_SYS_MCKR_CSS             0x1302
  65
  66 #endif