1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2007-2008
4 * Stelian Pop <stelian@popies.net>
5 * Lead Tech Design <www.leadtechdesign.com>
7 * Configuation settings for the AT91SAM9M10G45EK board(and AT91SAM9G45EKES).
13 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
15 /* ARM asynchronous clock */
16 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768
17 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
19 /* general purpose I/O */
20 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
23 #define LCD_BPP LCD_COLOR8
24 #define CONFIG_LCD_LOGO
25 #undef LCD_TEST_PATTERN
26 #define CONFIG_LCD_INFO
27 #define CONFIG_LCD_INFO_BELOW_LOGO
28 #define CONFIG_ATMEL_LCD
29 #define CONFIG_ATMEL_LCD_RGB565
32 #define CONFIG_SYS_SDRAM_BASE 0x70000000
33 #define CONFIG_SYS_SDRAM_SIZE 0x08000000
35 #define CONFIG_SYS_INIT_SP_ADDR \
36 (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
39 #ifdef CONFIG_CMD_NAND
40 #define CONFIG_SYS_MAX_NAND_DEVICE 1
41 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
42 #define CONFIG_SYS_NAND_DBW_8
44 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
46 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
47 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
48 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8
53 #define CONFIG_RESET_PHY_R
54 #define CONFIG_AT91_WANTS_COMMON_PHY
56 #ifdef CONFIG_NAND_BOOT
57 /* bootstrap + u-boot + env in nandflash */
59 /* bootstrap + u-boot + env + linux in mmc */
63 #define CONFIG_SPL_MAX_SIZE 0x010000
64 #define CONFIG_SPL_STACK 0x310000
66 #define CONFIG_SYS_MONITOR_LEN 0x80000
70 #define CONFIG_SPL_BSS_START_ADDR 0x70000000
71 #define CONFIG_SPL_BSS_MAX_SIZE 0x00080000
72 #define CONFIG_SYS_SPL_MALLOC_START 0x70080000
73 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000
75 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
77 #elif CONFIG_NAND_BOOT
78 #define CONFIG_SPL_NAND_SOFTECC
79 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
81 #define CONFIG_SYS_NAND_ECCSIZE 256
82 #define CONFIG_SYS_NAND_ECCBYTES 3
83 #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
84 48, 49, 50, 51, 52, 53, 54, 55, \
85 56, 57, 58, 59, 60, 61, 62, 63, }
88 #define CONFIG_SPL_ATMEL_SIZE
89 #define CONFIG_SYS_MASTER_CLOCK 132096000
90 #define CONFIG_SYS_AT91_PLLA 0x20c73f03
91 #define CONFIG_SYS_MCKR 0x1301
92 #define CONFIG_SYS_MCKR_CSS 0x1302