2 * (C) Copyright 2007-2008
3 * Stelian Pop <stelian@popies.net>
4 * Lead Tech Design <www.leadtechdesign.com>
6 * Configuation settings for the AT91SAM9M10G45EK board(and AT91SAM9G45EKES).
8 * SPDX-License-Identifier: GPL-2.0+
14 #include <asm/hardware.h>
16 #define CONFIG_SYS_TEXT_BASE 0x73f00000
18 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
20 /* ARM asynchronous clock */
21 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768
22 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
24 #define CONFIG_AT91SAM9M10G45EK
26 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
27 #define CONFIG_SETUP_MEMORY_TAGS
28 #define CONFIG_INITRD_TAG
29 #define CONFIG_SKIP_LOWLEVEL_INIT
30 #define CONFIG_BOARD_EARLY_INIT_F
31 #define CONFIG_DISPLAY_CPUINFO
33 #define CONFIG_CMD_BOOTZ
34 #define CONFIG_OF_LIBFDT
36 #define CONFIG_SYS_GENERIC_BOARD
38 /* general purpose I/O */
39 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
40 #define CONFIG_AT91_GPIO
41 #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
44 #define CONFIG_ATMEL_USART
45 #define CONFIG_USART_BASE ATMEL_BASE_DBGU
46 #define CONFIG_USART_ID ATMEL_ID_SYS
50 #define LCD_BPP LCD_COLOR8
51 #define CONFIG_LCD_LOGO
52 #undef LCD_TEST_PATTERN
53 #define CONFIG_LCD_INFO
54 #define CONFIG_LCD_INFO_BELOW_LOGO
55 #define CONFIG_SYS_WHITE_ON_BLACK
56 #define CONFIG_ATMEL_LCD
57 #define CONFIG_ATMEL_LCD_RGB565
58 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
59 /* board specific(not enough SRAM) */
60 #define CONFIG_AT91SAM9G45_LCD_BASE 0x73E00000
63 #define CONFIG_AT91_LED
64 #define CONFIG_RED_LED AT91_PIN_PD31 /* this is the user1 led */
65 #define CONFIG_GREEN_LED AT91_PIN_PD0 /* this is the user2 led */
67 #define CONFIG_BOOTDELAY 3
72 #define CONFIG_BOOTP_BOOTFILESIZE
73 #define CONFIG_BOOTP_BOOTPATH
74 #define CONFIG_BOOTP_GATEWAY
75 #define CONFIG_BOOTP_HOSTNAME
78 * Command line configuration.
82 #define CONFIG_SYS_NO_FLASH
83 #define CONFIG_CMD_PING
84 #define CONFIG_CMD_DHCP
85 #define CONFIG_CMD_NAND
86 #define CONFIG_CMD_USB
89 #define CONFIG_NR_DRAM_BANKS 1
90 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6
91 #define CONFIG_SYS_SDRAM_SIZE 0x08000000
93 #define CONFIG_SYS_INIT_SP_ADDR \
94 (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
97 #ifdef CONFIG_CMD_NAND
98 #define CONFIG_NAND_ATMEL
99 #define CONFIG_SYS_MAX_NAND_DEVICE 1
100 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
101 #define CONFIG_SYS_NAND_DBW_8
102 /* our ALE is AD21 */
103 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
104 /* our CLE is AD22 */
105 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
106 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
107 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8
112 #define CONFIG_CMD_MMC
114 #ifdef CONFIG_CMD_MMC
116 #define CONFIG_GENERIC_MMC
117 #define CONFIG_GENERIC_ATMEL_MCI
120 #if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC)
121 #define CONFIG_CMD_FAT
122 #define CONFIG_DOS_PARTITION
128 #define CONFIG_NET_RETRY_COUNT 20
129 #define CONFIG_RESET_PHY_R
130 #define CONFIG_AT91_WANTS_COMMON_PHY
133 #define CONFIG_USB_EHCI
134 #define CONFIG_USB_EHCI_ATMEL
135 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
136 #define CONFIG_USB_STORAGE
138 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
140 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
141 #define CONFIG_SYS_MEMTEST_END 0x23e00000
143 #ifdef CONFIG_SYS_USE_NANDFLASH
144 /* bootstrap + u-boot + env in nandflash */
145 #define CONFIG_ENV_IS_IN_NAND
146 #define CONFIG_ENV_OFFSET 0xc0000
147 #define CONFIG_ENV_OFFSET_REDUND 0x100000
148 #define CONFIG_ENV_SIZE 0x20000
150 #define CONFIG_BOOTCOMMAND \
151 "nand read 0x70000000 0x200000 0x300000;" \
153 #define CONFIG_BOOTARGS \
154 "console=ttyS0,115200 earlyprintk " \
155 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
156 "256k(env),256k(env_redundant),256k(spare)," \
157 "512k(dtb),6M(kernel)ro,-(rootfs) " \
158 "root=/dev/mtdblock7 rw rootfstype=jffs2"
159 #elif CONFIG_SYS_USE_MMC
160 /* bootstrap + u-boot + env + linux in mmc */
161 #define FAT_ENV_INTERFACE "mmc"
163 * We don't specify the part number, if device 0 has partition table, it means
164 * the first partition; it no partition table, then take whole device as a
167 #define FAT_ENV_DEVICE_AND_PART "0"
168 #define FAT_ENV_FILE "uboot.env"
169 #define CONFIG_ENV_IS_IN_FAT
170 #define CONFIG_FAT_WRITE
171 #define CONFIG_ENV_SIZE 0x4000
173 #define CONFIG_BOOTARGS "console=ttyS0,115200 " \
174 "mtdparts=atmel_nand:" \
175 "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
176 "root=/dev/mmcblk0p2 rw rootwait"
177 #define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x71000000 dtb; " \
178 "fatload mmc 0:1 0x72000000 zImage; " \
179 "bootz 0x72000000 - 0x71000000"
182 #define CONFIG_BAUDRATE 115200
184 #define CONFIG_SYS_PROMPT "U-Boot> "
185 #define CONFIG_SYS_CBSIZE 256
186 #define CONFIG_SYS_MAXARGS 16
187 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
188 #define CONFIG_SYS_LONGHELP
189 #define CONFIG_CMDLINE_EDITING
190 #define CONFIG_AUTO_COMPLETE
191 #define CONFIG_SYS_HUSH_PARSER
194 * Size of malloc() pool
196 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
198 /* Defines for SPL */
199 #define CONFIG_SPL_FRAMEWORK
200 #define CONFIG_SPL_TEXT_BASE 0x300000
201 #define CONFIG_SPL_MAX_SIZE 0x010000
202 #define CONFIG_SPL_STACK 0x310000
204 #define CONFIG_SPL_LIBCOMMON_SUPPORT
205 #define CONFIG_SPL_LIBGENERIC_SUPPORT
206 #define CONFIG_SPL_SERIAL_SUPPORT
207 #define CONFIG_SPL_GPIO_SUPPORT
209 #define CONFIG_SYS_MONITOR_LEN 0x80000
211 #ifdef CONFIG_SYS_USE_MMC
213 #define CONFIG_SPL_BSS_START_ADDR 0x70000000
214 #define CONFIG_SPL_BSS_MAX_SIZE 0x00080000
215 #define CONFIG_SYS_SPL_MALLOC_START 0x70080000
216 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000
218 #define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
219 #define CONFIG_SPL_MMC_SUPPORT
220 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400
221 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
222 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
223 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
224 #define CONFIG_SPL_FAT_SUPPORT
225 #define CONFIG_SPL_LIBDISK_SUPPORT
227 #elif CONFIG_SYS_USE_NANDFLASH
228 #define CONFIG_SPL_NAND_SUPPORT
229 #define CONFIG_SPL_NAND_DRIVERS
230 #define CONFIG_SPL_NAND_BASE
231 #define CONFIG_SPL_NAND_ECC
232 #define CONFIG_SPL_NAND_SOFTECC
233 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
234 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
235 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
237 #define CONFIG_SYS_NAND_PAGE_SIZE 0x800
238 #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
239 #define CONFIG_SYS_NAND_PAGE_COUNT 64
240 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
241 #define CONFIG_SYS_NAND_ECCSIZE 256
242 #define CONFIG_SYS_NAND_ECCBYTES 3
243 #define CONFIG_SYS_NAND_OOBSIZE 64
244 #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
245 48, 49, 50, 51, 52, 53, 54, 55, \
246 56, 57, 58, 59, 60, 61, 62, 63, }
249 #define CONFIG_SPL_ATMEL_SIZE
250 #define CONFIG_SYS_MASTER_CLOCK 132096000
251 #define CONFIG_SYS_AT91_PLLA 0x20c73f03
252 #define CONFIG_SYS_MCKR 0x1301
253 #define CONFIG_SYS_MCKR_CSS 0x1302
255 #define ATMEL_BASE_MPDDRC ATMEL_BASE_DDRSDRC0