include/configs/at91sam9261ek.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * (C) Copyright 2007-2008
   4  * Stelian Pop <stelian@popies.net>
   5  * Lead Tech Design <www.leadtechdesign.com>
   6  *
   7  * Configuation settings for the AT91SAM9261EK board.
   8  */
   9
  10 #ifndef __CONFIG_H
  11 #define __CONFIG_H
  12
  13 /* ARM asynchronous clock */
  14 #define CONFIG_SYS_AT91_SLOW_CLOCK      32768           /* slow clock xtal */
  15 #define CONFIG_SYS_AT91_MAIN_CLOCK      18432000        /* 18.432 MHz crystal */
  16
  17 #ifdef CONFIG_AT91SAM9G10
  18 #define CONFIG_AT91SAM9G10EK            /* It's an Atmel AT91SAM9G10 EK*/
  19 #else
  20 #define CONFIG_AT91SAM9261EK            /* It's an Atmel AT91SAM9261 EK*/
  21 #endif
  22
  23 #include <asm/hardware.h>
  24
  25 #define CONFIG_ATMEL_LEGACY
  26
  27 /*
  28  * Hardware drivers
  29  */
  30
  31 /* LCD */
  32 #define LCD_BPP                         LCD_COLOR8
  33 #define CONFIG_LCD_LOGO
  34 #undef LCD_TEST_PATTERN
  35 #define CONFIG_LCD_INFO
  36 #define CONFIG_LCD_INFO_BELOW_LOGO
  37 #define CONFIG_ATMEL_LCD
  38 #ifdef CONFIG_AT91SAM9261EK
  39 #define CONFIG_ATMEL_LCD_BGR555
  40 #endif
  41
  42 /* SDRAM */
  43 #define CONFIG_SYS_SDRAM_BASE           0x20000000
  44 #define CONFIG_SYS_SDRAM_SIZE           0x04000000
  45 #define CONFIG_SYS_INIT_SP_ADDR \
  46         (ATMEL_BASE_SRAM + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
  47
  48 /* NAND flash */
  49 #ifdef CONFIG_CMD_NAND
  50 #define CONFIG_SYS_MAX_NAND_DEVICE              1
  51 #define CONFIG_SYS_NAND_BASE                    0x40000000
  52 #define CONFIG_SYS_NAND_DBW_8
  53 /* our ALE is AD22 */
  54 #define CONFIG_SYS_NAND_MASK_ALE                (1 << 22)
  55 /* our CLE is AD21 */
  56 #define CONFIG_SYS_NAND_MASK_CLE                (1 << 21)
  57 #define CONFIG_SYS_NAND_ENABLE_PIN              AT91_PIN_PC14
  58 #define CONFIG_SYS_NAND_READY_PIN               AT91_PIN_PC15
  59
  60 #endif
  61
  62 /* Ethernet */
  63 #define CONFIG_DRIVER_DM9000
  64 #define CONFIG_DM9000_BASE              0x30000000
  65 #define DM9000_IO                       CONFIG_DM9000_BASE
  66 #define DM9000_DATA                     (CONFIG_DM9000_BASE + 4)
  67 #define CONFIG_DM9000_USE_16BIT
  68 #define CONFIG_DM9000_NO_SROM
  69 #define CONFIG_NET_RETRY_COUNT          20
  70 #define CONFIG_RESET_PHY_R
  71
  72 /* USB */
  73 #define CONFIG_USB_ATMEL
  74 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
  75 #define CONFIG_USB_OHCI_NEW
  76 #define CONFIG_SYS_USB_OHCI_CPU_INIT
  77 #define CONFIG_SYS_USB_OHCI_REGS_BASE           0x00500000      /* AT91SAM9261_UHP_BASE */
  78 #ifdef CONFIG_AT91SAM9G10EK
  79 #define CONFIG_SYS_USB_OHCI_SLOT_NAME           "at91sam9g10"
  80 #else
  81 #define CONFIG_SYS_USB_OHCI_SLOT_NAME           "at91sam9261"
  82 #endif
  83 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      2
  84
  85 #ifdef CONFIG_SYS_USE_DATAFLASH_CS0
  86
  87 /* bootstrap + u-boot + env + linux in dataflash on CS0 */
  88
  89 #elif CONFIG_SYS_USE_DATAFLASH_CS3
  90
  91 /* bootstrap + u-boot + env + linux in dataflash on CS3 */
  92
  93 #else /* CONFIG_SYS_USE_NANDFLASH */
  94
  95 /* bootstrap + u-boot + env + linux in nandflash */
  96 #endif
  97
  98 #endif