include/configs/at91sam9261ek.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * (C) Copyright 2007-2008
   4  * Stelian Pop <stelian@popies.net>
   5  * Lead Tech Design <www.leadtechdesign.com>
   6  *
   7  * Configuation settings for the AT91SAM9261EK board.
   8  */
   9
  10 #ifndef __CONFIG_H
  11 #define __CONFIG_H
  12
  13 /* ARM asynchronous clock */
  14 #define CONFIG_SYS_AT91_SLOW_CLOCK      32768           /* slow clock xtal */
  15 #define CONFIG_SYS_AT91_MAIN_CLOCK      18432000        /* 18.432 MHz crystal */
  16
  17 #include <asm/hardware.h>
  18
  19 #define CONFIG_ATMEL_LEGACY
  20
  21 /*
  22  * Hardware drivers
  23  */
  24
  25 /* LCD */
  26 #define LCD_BPP                         LCD_COLOR8
  27 #define CONFIG_LCD_LOGO
  28 #undef LCD_TEST_PATTERN
  29 #define CONFIG_LCD_INFO
  30 #define CONFIG_LCD_INFO_BELOW_LOGO
  31 #define CONFIG_ATMEL_LCD
  32 #ifdef CONFIG_AT91SAM9261EK
  33 #define CONFIG_ATMEL_LCD_BGR555
  34 #endif
  35
  36 /* SDRAM */
  37 #define CONFIG_SYS_SDRAM_BASE           0x20000000
  38 #define CONFIG_SYS_SDRAM_SIZE           0x04000000
  39 #define CONFIG_SYS_INIT_SP_ADDR \
  40         (ATMEL_BASE_SRAM + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
  41
  42 /* NAND flash */
  43 #ifdef CONFIG_CMD_NAND
  44 #define CONFIG_SYS_MAX_NAND_DEVICE              1
  45 #define CONFIG_SYS_NAND_BASE                    0x40000000
  46 #define CONFIG_SYS_NAND_DBW_8
  47 /* our ALE is AD22 */
  48 #define CONFIG_SYS_NAND_MASK_ALE                (1 << 22)
  49 /* our CLE is AD21 */
  50 #define CONFIG_SYS_NAND_MASK_CLE                (1 << 21)
  51 #define CONFIG_SYS_NAND_ENABLE_PIN              AT91_PIN_PC14
  52 #define CONFIG_SYS_NAND_READY_PIN               AT91_PIN_PC15
  53
  54 #endif
  55
  56 /* Ethernet */
  57 #define CONFIG_DRIVER_DM9000
  58 #define CONFIG_DM9000_BASE              0x30000000
  59 #define DM9000_IO                       CONFIG_DM9000_BASE
  60 #define DM9000_DATA                     (CONFIG_DM9000_BASE + 4)
  61 #define CONFIG_DM9000_USE_16BIT
  62 #define CONFIG_DM9000_NO_SROM
  63 #define CONFIG_RESET_PHY_R
  64
  65 /* USB */
  66 #define CONFIG_USB_ATMEL
  67 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
  68 #define CONFIG_USB_OHCI_NEW
  69 #define CONFIG_SYS_USB_OHCI_CPU_INIT
  70 #define CONFIG_SYS_USB_OHCI_REGS_BASE           0x00500000      /* AT91SAM9261_UHP_BASE */
  71 #ifdef CONFIG_AT91SAM9G10EK
  72 #define CONFIG_SYS_USB_OHCI_SLOT_NAME           "at91sam9g10"
  73 #else
  74 #define CONFIG_SYS_USB_OHCI_SLOT_NAME           "at91sam9261"
  75 #endif
  76 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      2
  77
  78 #ifdef CONFIG_SYS_USE_DATAFLASH_CS0
  79
  80 /* bootstrap + u-boot + env + linux in dataflash on CS0 */
  81
  82 #elif CONFIG_SYS_USE_DATAFLASH_CS3
  83
  84 /* bootstrap + u-boot + env + linux in dataflash on CS3 */
  85
  86 #else /* CONFIG_SYS_USE_NANDFLASH */
  87
  88 /* bootstrap + u-boot + env + linux in nandflash */
  89 #endif
  90
  91 #endif