2 * (C) Copyright 2007-2008
3 * Stelian Pop <stelian.pop@leadtechdesign.com>
4 * Lead Tech Design <www.leadtechdesign.com>
6 * Configuation settings for the AT91SAM9261EK board.
8 * See file CREDITS for list of people who contributed to this
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 /* ARM asynchronous clock */
31 #define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
32 #define CONFIG_SYS_HZ 1000
34 #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
35 #ifdef CONFIG_AT91SAM9G10EK
36 #define CONFIG_AT91SAM9G10 1 /* It's an Atmel AT91SAM9G10 SoC*/
38 #define CONFIG_AT91SAM9261 1 /* It's an Atmel AT91SAM9261 SoC*/
40 #define CONFIG_ARCH_CPU_INIT
41 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
43 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
44 #define CONFIG_SETUP_MEMORY_TAGS 1
45 #define CONFIG_INITRD_TAG 1
47 #define CONFIG_SKIP_LOWLEVEL_INIT
48 #define CONFIG_SKIP_RELOCATE_UBOOT
53 #define CONFIG_ATMEL_USART 1
57 #define CONFIG_USART3 1 /* USART 3 is DBGU */
61 #define LCD_BPP LCD_COLOR8
62 #define CONFIG_LCD_LOGO 1
63 #undef LCD_TEST_PATTERN
64 #define CONFIG_LCD_INFO 1
65 #define CONFIG_LCD_INFO_BELOW_LOGO 1
66 #define CONFIG_SYS_WHITE_ON_BLACK 1
67 #define CONFIG_ATMEL_LCD 1
68 #ifdef CONFIG_AT91SAM9261EK
69 #define CONFIG_ATMEL_LCD_BGR555 1
71 #define CONFIG_AT91SAM9G10_LCD_BASE 0x23E00000 /* LCD is no more in SRAM */
73 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
76 #define CONFIG_AT91_LED
77 #define CONFIG_RED_LED AT91_PIN_PA23 /* this is the power led */
78 #define CONFIG_GREEN_LED AT91_PIN_PA13 /* this is the user1 led */
79 #define CONFIG_YELLOW_LED AT91_PIN_PA14 /* this is the user2 led */
81 #define CONFIG_BOOTDELAY 3
86 #define CONFIG_BOOTP_BOOTFILESIZE 1
87 #define CONFIG_BOOTP_BOOTPATH 1
88 #define CONFIG_BOOTP_GATEWAY 1
89 #define CONFIG_BOOTP_HOSTNAME 1
92 * Command line configuration.
94 #include <config_cmd_default.h>
96 #undef CONFIG_CMD_FPGA
98 #undef CONFIG_CMD_IMLS
99 #undef CONFIG_CMD_LOADS
100 #undef CONFIG_CMD_SOURCE
102 #define CONFIG_CMD_PING 1
103 #define CONFIG_CMD_DHCP 1
104 #define CONFIG_CMD_NAND 1
105 #define CONFIG_CMD_USB 1
108 #define CONFIG_NR_DRAM_BANKS 1
109 #define PHYS_SDRAM 0x20000000
110 #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
113 #define CONFIG_ATMEL_DATAFLASH_SPI
114 #define CONFIG_HAS_DATAFLASH 1
115 #define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
116 #define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
117 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
118 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* CS3 */
119 #define AT91_SPI_CLK 15000000
120 #define DATAFLASH_TCSS (0x1a << 16)
121 #define DATAFLASH_TCHS (0x1 << 24)
124 #ifdef CONFIG_CMD_NAND
125 #define CONFIG_NAND_ATMEL
126 #define CONFIG_SYS_MAX_NAND_DEVICE 1
127 #define CONFIG_SYS_NAND_BASE 0x40000000
128 #define CONFIG_SYS_NAND_DBW_8 1
129 /* our ALE is AD22 */
130 #define CONFIG_SYS_NAND_MASK_ALE (1 << 22)
131 /* our CLE is AD21 */
132 #define CONFIG_SYS_NAND_MASK_CLE (1 << 21)
133 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
134 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC15
136 #define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
139 /* NOR flash - no real flash on this board */
140 #define CONFIG_SYS_NO_FLASH 1
143 #define CONFIG_NET_MULTI 1
144 #define CONFIG_DRIVER_DM9000 1
145 #define CONFIG_DM9000_BASE 0x30000000
146 #define DM9000_IO CONFIG_DM9000_BASE
147 #define DM9000_DATA (CONFIG_DM9000_BASE + 4)
148 #define CONFIG_DM9000_USE_16BIT 1
149 #define CONFIG_DM9000_NO_SROM 1
150 #define CONFIG_NET_RETRY_COUNT 20
151 #define CONFIG_RESET_PHY_R 1
154 #define CONFIG_USB_ATMEL
155 #define CONFIG_USB_OHCI_NEW 1
156 #define CONFIG_DOS_PARTITION 1
157 #define CONFIG_SYS_USB_OHCI_CPU_INIT 1
158 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */
159 #ifdef CONFIG_AT91SAM9G10EK
160 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9g10"
162 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9261"
164 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
165 #define CONFIG_USB_STORAGE 1
166 #define CONFIG_CMD_FAT 1
168 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
170 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
171 #define CONFIG_SYS_MEMTEST_END 0x23e00000
173 #ifdef CONFIG_SYS_USE_DATAFLASH_CS0
175 /* bootstrap + u-boot + env + linux in dataflash on CS0 */
176 #define CONFIG_ENV_IS_IN_DATAFLASH 1
177 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
178 #define CONFIG_ENV_OFFSET 0x4200
179 #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
180 #define CONFIG_ENV_SIZE 0x4200
181 #define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm"
182 #define CONFIG_BOOTARGS "console=ttyS0,115200 " \
183 "root=/dev/mtdblock0 " \
184 "mtdparts=atmel_nand:-(root) " \
185 "rw rootfstype=jffs2"
187 #elif CONFIG_SYS_USE_DATAFLASH_CS3
189 /* bootstrap + u-boot + env + linux in dataflash on CS3 */
190 #define CONFIG_ENV_IS_IN_DATAFLASH 1
191 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + 0x8400)
192 #define CONFIG_ENV_OFFSET 0x4200
193 #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + CONFIG_ENV_OFFSET)
194 #define CONFIG_ENV_SIZE 0x4200
195 #define CONFIG_BOOTCOMMAND "cp.b 0xD0042000 0x22000000 0x210000; bootm"
196 #define CONFIG_BOOTARGS "console=ttyS0,115200 " \
197 "root=/dev/mtdblock0 " \
198 "mtdparts=atmel_nand:-(root) " \
199 "rw rootfstype=jffs2"
201 #else /* CONFIG_SYS_USE_NANDFLASH */
203 /* bootstrap + u-boot + env + linux in nandflash */
204 #define CONFIG_ENV_IS_IN_NAND 1
205 #define CONFIG_ENV_OFFSET 0x60000
206 #define CONFIG_ENV_OFFSET_REDUND 0x80000
207 #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
208 #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm"
209 #define CONFIG_BOOTARGS "console=ttyS0,115200 " \
210 "root=/dev/mtdblock5 " \
211 "mtdparts=atmel_nand:128k(bootstrap)ro," \
212 "256k(uboot)ro,128k(env1)ro," \
213 "128k(env2)ro,2M(linux),-(root) " \
214 "rw rootfstype=jffs2"
218 #define CONFIG_BAUDRATE 115200
219 #define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
221 #define CONFIG_SYS_PROMPT "U-Boot> "
222 #define CONFIG_SYS_CBSIZE 256
223 #define CONFIG_SYS_MAXARGS 16
224 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
225 #define CONFIG_SYS_LONGHELP 1
226 #define CONFIG_CMDLINE_EDITING 1
229 * Size of malloc() pool
231 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
232 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
234 #define CONFIG_STACKSIZE (32*1024) /* regular stack */
236 #ifdef CONFIG_USE_IRQ
237 #error CONFIG_USE_IRQ not supported