2 * (C) Copyright 2007-2008
3 * Stelian Pop <stelian@popies.net>
4 * Lead Tech Design <www.leadtechdesign.com>
6 * Configuation settings for the AT91SAM9261EK board.
8 * SPDX-License-Identifier: GPL-2.0+
14 /* ARM asynchronous clock */
15 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
16 #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
18 #ifdef CONFIG_AT91SAM9G10
19 #define CONFIG_AT91SAM9G10EK /* It's an Atmel AT91SAM9G10 EK*/
21 #define CONFIG_AT91SAM9261EK /* It's an Atmel AT91SAM9261 EK*/
24 #include <asm/hardware.h>
26 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
27 #define CONFIG_SETUP_MEMORY_TAGS
28 #define CONFIG_INITRD_TAG
30 #define CONFIG_SKIP_LOWLEVEL_INIT
32 #define CONFIG_DISPLAY_CPUINFO
34 #define CONFIG_ATMEL_LEGACY
35 #define CONFIG_SYS_TEXT_BASE 0x21f00000
42 #define CONFIG_AT91_GPIO
43 #define CONFIG_AT91_GPIO_PULLUP 1
46 #define CONFIG_ATMEL_USART
47 #define CONFIG_USART_BASE ATMEL_BASE_DBGU
48 #define CONFIG_USART_ID ATMEL_ID_SYS
49 #define CONFIG_BAUDRATE 115200
53 #define LCD_BPP LCD_COLOR8
54 #define CONFIG_LCD_LOGO
55 #undef LCD_TEST_PATTERN
56 #define CONFIG_LCD_INFO
57 #define CONFIG_LCD_INFO_BELOW_LOGO
58 #define CONFIG_SYS_WHITE_ON_BLACK
59 #define CONFIG_ATMEL_LCD
60 #ifdef CONFIG_AT91SAM9261EK
61 #define CONFIG_ATMEL_LCD_BGR555
64 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
67 #define CONFIG_AT91_LED
68 #define CONFIG_RED_LED AT91_PIN_PA23 /* this is the power led */
69 #define CONFIG_GREEN_LED AT91_PIN_PA13 /* this is the user1 led */
70 #define CONFIG_YELLOW_LED AT91_PIN_PA14 /* this is the user2 led */
72 #define CONFIG_BOOTDELAY 3
77 #define CONFIG_BOOTP_BOOTFILESIZE
78 #define CONFIG_BOOTP_BOOTPATH
79 #define CONFIG_BOOTP_GATEWAY
80 #define CONFIG_BOOTP_HOSTNAME
83 * Command line configuration.
85 #define CONFIG_CMD_NAND
88 #define CONFIG_NR_DRAM_BANKS 1
89 #define CONFIG_SYS_SDRAM_BASE 0x20000000
90 #define CONFIG_SYS_SDRAM_SIZE 0x04000000
91 #define CONFIG_SYS_INIT_SP_ADDR \
92 (ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE)
95 #define CONFIG_ATMEL_DATAFLASH_SPI
96 #define CONFIG_HAS_DATAFLASH
97 #define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
98 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
99 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* CS3 */
100 #define AT91_SPI_CLK 15000000
101 #define DATAFLASH_TCSS (0x1a << 16)
102 #define DATAFLASH_TCHS (0x1 << 24)
105 #ifdef CONFIG_CMD_NAND
106 #define CONFIG_NAND_ATMEL
107 #define CONFIG_SYS_MAX_NAND_DEVICE 1
108 #define CONFIG_SYS_NAND_BASE 0x40000000
109 #define CONFIG_SYS_NAND_DBW_8
110 /* our ALE is AD22 */
111 #define CONFIG_SYS_NAND_MASK_ALE (1 << 22)
112 /* our CLE is AD21 */
113 #define CONFIG_SYS_NAND_MASK_CLE (1 << 21)
114 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
115 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC15
119 /* NOR flash - no real flash on this board */
120 #define CONFIG_SYS_NO_FLASH
123 #define CONFIG_DRIVER_DM9000
124 #define CONFIG_DM9000_BASE 0x30000000
125 #define DM9000_IO CONFIG_DM9000_BASE
126 #define DM9000_DATA (CONFIG_DM9000_BASE + 4)
127 #define CONFIG_DM9000_USE_16BIT
128 #define CONFIG_DM9000_NO_SROM
129 #define CONFIG_NET_RETRY_COUNT 20
130 #define CONFIG_RESET_PHY_R
133 #define CONFIG_USB_ATMEL
134 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
135 #define CONFIG_USB_OHCI_NEW
136 #define CONFIG_DOS_PARTITION
137 #define CONFIG_SYS_USB_OHCI_CPU_INIT
138 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */
139 #ifdef CONFIG_AT91SAM9G10EK
140 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9g10"
142 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9261"
144 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
145 #define CONFIG_USB_STORAGE
147 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
149 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
150 #define CONFIG_SYS_MEMTEST_END 0x23e00000
152 #ifdef CONFIG_SYS_USE_DATAFLASH_CS0
154 /* bootstrap + u-boot + env + linux in dataflash on CS0 */
155 #define CONFIG_ENV_IS_IN_DATAFLASH
156 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
157 #define CONFIG_ENV_OFFSET 0x4200
158 #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
159 #define CONFIG_ENV_SIZE 0x4200
160 #define CONFIG_BOOTCOMMAND "cp.b 0xC0084000 0x22000000 0x210000; bootm"
161 #define CONFIG_BOOTARGS "console=ttyS0,115200 " \
162 "root=/dev/mtdblock0 " \
163 "mtdparts=atmel_nand:-(root) " \
164 "rw rootfstype=jffs2"
166 #elif CONFIG_SYS_USE_DATAFLASH_CS3
168 /* bootstrap + u-boot + env + linux in dataflash on CS3 */
169 #define CONFIG_ENV_IS_IN_DATAFLASH
170 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + 0x8400)
171 #define CONFIG_ENV_OFFSET 0x4200
172 #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + CONFIG_ENV_OFFSET)
173 #define CONFIG_ENV_SIZE 0x4200
174 #define CONFIG_BOOTCOMMAND "cp.b 0xD0084000 0x22000000 0x210000; bootm"
175 #define CONFIG_BOOTARGS "console=ttyS0,115200 " \
176 "root=/dev/mtdblock0 " \
177 "mtdparts=atmel_nand:-(root) " \
178 "rw rootfstype=jffs2"
180 #else /* CONFIG_SYS_USE_NANDFLASH */
182 /* bootstrap + u-boot + env + linux in nandflash */
183 #define CONFIG_ENV_IS_IN_NAND
184 #define CONFIG_ENV_OFFSET 0xc0000
185 #define CONFIG_ENV_OFFSET_REDUND 0x100000
186 #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
187 #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
188 #define CONFIG_BOOTARGS \
189 "console=ttyS0,115200 earlyprintk " \
190 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
191 "256k(env),256k(env_redundant),256k(spare)," \
192 "512k(dtb),6M(kernel)ro,-(rootfs) " \
193 "root=/dev/mtdblock7 rw rootfstype=jffs2"
196 #define CONFIG_SYS_CBSIZE 256
197 #define CONFIG_SYS_MAXARGS 16
198 #define CONFIG_SYS_LONGHELP
199 #define CONFIG_CMDLINE_EDITING
200 #define CONFIG_AUTO_COMPLETE
203 * Size of malloc() pool
205 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)