2 * (C) Copyright 2007-2008
3 * Stelian Pop <stelian@popies.net>
4 * Lead Tech Design <www.leadtechdesign.com>
6 * Configuation settings for the AT91SAM9261EK board.
8 * SPDX-License-Identifier: GPL-2.0+
14 /* ARM asynchronous clock */
15 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
16 #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
18 #ifdef CONFIG_AT91SAM9G10
19 #define CONFIG_AT91SAM9G10EK /* It's an Atmel AT91SAM9G10 EK*/
21 #define CONFIG_AT91SAM9261EK /* It's an Atmel AT91SAM9261 EK*/
24 #include <asm/hardware.h>
26 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
27 #define CONFIG_SETUP_MEMORY_TAGS
28 #define CONFIG_INITRD_TAG
30 #define CONFIG_SKIP_LOWLEVEL_INIT
32 #define CONFIG_ATMEL_LEGACY
33 #define CONFIG_SYS_TEXT_BASE 0x21f00000
40 #define CONFIG_AT91_GPIO
41 #define CONFIG_AT91_GPIO_PULLUP 1
44 #define CONFIG_ATMEL_USART
45 #define CONFIG_USART_BASE ATMEL_BASE_DBGU
46 #define CONFIG_USART_ID ATMEL_ID_SYS
49 #define LCD_BPP LCD_COLOR8
50 #define CONFIG_LCD_LOGO
51 #undef LCD_TEST_PATTERN
52 #define CONFIG_LCD_INFO
53 #define CONFIG_LCD_INFO_BELOW_LOGO
54 #define CONFIG_ATMEL_LCD
55 #ifdef CONFIG_AT91SAM9261EK
56 #define CONFIG_ATMEL_LCD_BGR555
60 #define CONFIG_AT91_LED
61 #define CONFIG_RED_LED AT91_PIN_PA23 /* this is the power led */
62 #define CONFIG_GREEN_LED AT91_PIN_PA13 /* this is the user1 led */
63 #define CONFIG_YELLOW_LED AT91_PIN_PA14 /* this is the user2 led */
69 #define CONFIG_BOOTP_BOOTFILESIZE
70 #define CONFIG_BOOTP_BOOTPATH
71 #define CONFIG_BOOTP_GATEWAY
72 #define CONFIG_BOOTP_HOSTNAME
75 * Command line configuration.
77 #define CONFIG_CMD_NAND
80 #define CONFIG_NR_DRAM_BANKS 1
81 #define CONFIG_SYS_SDRAM_BASE 0x20000000
82 #define CONFIG_SYS_SDRAM_SIZE 0x04000000
83 #define CONFIG_SYS_INIT_SP_ADDR \
84 (ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE)
87 #define CONFIG_ATMEL_DATAFLASH_SPI
88 #define CONFIG_HAS_DATAFLASH
89 #define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
90 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
91 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* CS3 */
92 #define AT91_SPI_CLK 15000000
93 #define DATAFLASH_TCSS (0x1a << 16)
94 #define DATAFLASH_TCHS (0x1 << 24)
97 #ifdef CONFIG_CMD_NAND
98 #define CONFIG_NAND_ATMEL
99 #define CONFIG_SYS_MAX_NAND_DEVICE 1
100 #define CONFIG_SYS_NAND_BASE 0x40000000
101 #define CONFIG_SYS_NAND_DBW_8
102 /* our ALE is AD22 */
103 #define CONFIG_SYS_NAND_MASK_ALE (1 << 22)
104 /* our CLE is AD21 */
105 #define CONFIG_SYS_NAND_MASK_CLE (1 << 21)
106 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
107 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC15
112 #define CONFIG_DRIVER_DM9000
113 #define CONFIG_DM9000_BASE 0x30000000
114 #define DM9000_IO CONFIG_DM9000_BASE
115 #define DM9000_DATA (CONFIG_DM9000_BASE + 4)
116 #define CONFIG_DM9000_USE_16BIT
117 #define CONFIG_DM9000_NO_SROM
118 #define CONFIG_NET_RETRY_COUNT 20
119 #define CONFIG_RESET_PHY_R
122 #define CONFIG_USB_ATMEL
123 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
124 #define CONFIG_USB_OHCI_NEW
125 #define CONFIG_SYS_USB_OHCI_CPU_INIT
126 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */
127 #ifdef CONFIG_AT91SAM9G10EK
128 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9g10"
130 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9261"
132 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
134 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
136 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
137 #define CONFIG_SYS_MEMTEST_END 0x23e00000
139 #ifdef CONFIG_SYS_USE_DATAFLASH_CS0
141 /* bootstrap + u-boot + env + linux in dataflash on CS0 */
142 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
143 #define CONFIG_ENV_OFFSET 0x4200
144 #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
145 #define CONFIG_ENV_SIZE 0x4200
146 #define CONFIG_BOOTCOMMAND "cp.b 0xC0084000 0x22000000 0x210000; bootm"
147 #define CONFIG_BOOTARGS "console=ttyS0,115200 " \
148 "root=/dev/mtdblock0 " \
149 "mtdparts=atmel_nand:-(root) " \
150 "rw rootfstype=jffs2"
152 #elif CONFIG_SYS_USE_DATAFLASH_CS3
154 /* bootstrap + u-boot + env + linux in dataflash on CS3 */
155 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + 0x8400)
156 #define CONFIG_ENV_OFFSET 0x4200
157 #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + CONFIG_ENV_OFFSET)
158 #define CONFIG_ENV_SIZE 0x4200
159 #define CONFIG_BOOTCOMMAND "cp.b 0xD0084000 0x22000000 0x210000; bootm"
160 #define CONFIG_BOOTARGS "console=ttyS0,115200 " \
161 "root=/dev/mtdblock0 " \
162 "mtdparts=atmel_nand:-(root) " \
163 "rw rootfstype=jffs2"
165 #else /* CONFIG_SYS_USE_NANDFLASH */
167 /* bootstrap + u-boot + env + linux in nandflash */
168 #define CONFIG_ENV_OFFSET 0xc0000
169 #define CONFIG_ENV_OFFSET_REDUND 0x100000
170 #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
171 #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
172 #define CONFIG_BOOTARGS \
173 "console=ttyS0,115200 earlyprintk " \
174 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
175 "256k(env),256k(env_redundant),256k(spare)," \
176 "512k(dtb),6M(kernel)ro,-(rootfs) " \
177 "root=/dev/mtdblock7 rw rootfstype=jffs2"
180 #define CONFIG_SYS_CBSIZE 256
181 #define CONFIG_SYS_MAXARGS 16
182 #define CONFIG_SYS_LONGHELP
183 #define CONFIG_CMDLINE_EDITING
184 #define CONFIG_AUTO_COMPLETE
187 * Size of malloc() pool
189 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)