2 * (C) Copyright 2007-2008
3 * Stelian Pop <stelian@popies.net>
4 * Lead Tech Design <www.leadtechdesign.com>
6 * Configuation settings for the AT91SAM9261EK board.
8 * SPDX-License-Identifier: GPL-2.0+
14 /* ARM asynchronous clock */
15 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
16 #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
18 #ifdef CONFIG_AT91SAM9G10
19 #define CONFIG_AT91SAM9G10EK /* It's an Atmel AT91SAM9G10 EK*/
21 #define CONFIG_AT91SAM9261EK /* It's an Atmel AT91SAM9261 EK*/
24 #include <asm/hardware.h>
26 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
27 #define CONFIG_SETUP_MEMORY_TAGS
28 #define CONFIG_INITRD_TAG
30 #define CONFIG_SKIP_LOWLEVEL_INIT
32 #define CONFIG_DISPLAY_CPUINFO
34 #define CONFIG_OF_LIBFDT
36 #define CONFIG_SYS_GENERIC_BOARD
38 #define CONFIG_ATMEL_LEGACY
39 #define CONFIG_SYS_TEXT_BASE 0x21f00000
46 #define CONFIG_AT91_GPIO
47 #define CONFIG_AT91_GPIO_PULLUP 1
50 #define CONFIG_ATMEL_USART
51 #define CONFIG_USART_BASE ATMEL_BASE_DBGU
52 #define CONFIG_USART_ID ATMEL_ID_SYS
53 #define CONFIG_BAUDRATE 115200
57 #define LCD_BPP LCD_COLOR8
58 #define CONFIG_LCD_LOGO
59 #undef LCD_TEST_PATTERN
60 #define CONFIG_LCD_INFO
61 #define CONFIG_LCD_INFO_BELOW_LOGO
62 #define CONFIG_SYS_WHITE_ON_BLACK
63 #define CONFIG_ATMEL_LCD
64 #ifdef CONFIG_AT91SAM9261EK
65 #define CONFIG_ATMEL_LCD_BGR555
68 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
71 #define CONFIG_AT91_LED
72 #define CONFIG_RED_LED AT91_PIN_PA23 /* this is the power led */
73 #define CONFIG_GREEN_LED AT91_PIN_PA13 /* this is the user1 led */
74 #define CONFIG_YELLOW_LED AT91_PIN_PA14 /* this is the user2 led */
76 #define CONFIG_BOOTDELAY 3
81 #define CONFIG_BOOTP_BOOTFILESIZE
82 #define CONFIG_BOOTP_BOOTPATH
83 #define CONFIG_BOOTP_GATEWAY
84 #define CONFIG_BOOTP_HOSTNAME
87 * Command line configuration.
89 #define CONFIG_CMD_PING
90 #define CONFIG_CMD_DHCP
91 #define CONFIG_CMD_NAND
92 #define CONFIG_CMD_USB
95 #define CONFIG_NR_DRAM_BANKS 1
96 #define CONFIG_SYS_SDRAM_BASE 0x20000000
97 #define CONFIG_SYS_SDRAM_SIZE 0x04000000
98 #define CONFIG_SYS_INIT_SP_ADDR \
99 (ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE)
102 #define CONFIG_ATMEL_DATAFLASH_SPI
103 #define CONFIG_HAS_DATAFLASH
104 #define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
105 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
106 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* CS3 */
107 #define AT91_SPI_CLK 15000000
108 #define DATAFLASH_TCSS (0x1a << 16)
109 #define DATAFLASH_TCHS (0x1 << 24)
112 #ifdef CONFIG_CMD_NAND
113 #define CONFIG_NAND_ATMEL
114 #define CONFIG_SYS_MAX_NAND_DEVICE 1
115 #define CONFIG_SYS_NAND_BASE 0x40000000
116 #define CONFIG_SYS_NAND_DBW_8
117 /* our ALE is AD22 */
118 #define CONFIG_SYS_NAND_MASK_ALE (1 << 22)
119 /* our CLE is AD21 */
120 #define CONFIG_SYS_NAND_MASK_CLE (1 << 21)
121 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
122 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC15
126 /* NOR flash - no real flash on this board */
127 #define CONFIG_SYS_NO_FLASH
130 #define CONFIG_DRIVER_DM9000
131 #define CONFIG_DM9000_BASE 0x30000000
132 #define DM9000_IO CONFIG_DM9000_BASE
133 #define DM9000_DATA (CONFIG_DM9000_BASE + 4)
134 #define CONFIG_DM9000_USE_16BIT
135 #define CONFIG_DM9000_NO_SROM
136 #define CONFIG_NET_RETRY_COUNT 20
137 #define CONFIG_RESET_PHY_R
140 #define CONFIG_USB_ATMEL
141 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
142 #define CONFIG_USB_OHCI_NEW
143 #define CONFIG_DOS_PARTITION
144 #define CONFIG_SYS_USB_OHCI_CPU_INIT
145 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */
146 #ifdef CONFIG_AT91SAM9G10EK
147 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9g10"
149 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9261"
151 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
152 #define CONFIG_USB_STORAGE
153 #define CONFIG_CMD_FAT
155 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
157 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
158 #define CONFIG_SYS_MEMTEST_END 0x23e00000
160 #ifdef CONFIG_SYS_USE_DATAFLASH_CS0
162 /* bootstrap + u-boot + env + linux in dataflash on CS0 */
163 #define CONFIG_ENV_IS_IN_DATAFLASH
164 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
165 #define CONFIG_ENV_OFFSET 0x4200
166 #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
167 #define CONFIG_ENV_SIZE 0x4200
168 #define CONFIG_BOOTCOMMAND "cp.b 0xC0084000 0x22000000 0x210000; bootm"
169 #define CONFIG_BOOTARGS "console=ttyS0,115200 " \
170 "root=/dev/mtdblock0 " \
171 "mtdparts=atmel_nand:-(root) " \
172 "rw rootfstype=jffs2"
174 #elif CONFIG_SYS_USE_DATAFLASH_CS3
176 /* bootstrap + u-boot + env + linux in dataflash on CS3 */
177 #define CONFIG_ENV_IS_IN_DATAFLASH
178 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + 0x8400)
179 #define CONFIG_ENV_OFFSET 0x4200
180 #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + CONFIG_ENV_OFFSET)
181 #define CONFIG_ENV_SIZE 0x4200
182 #define CONFIG_BOOTCOMMAND "cp.b 0xD0084000 0x22000000 0x210000; bootm"
183 #define CONFIG_BOOTARGS "console=ttyS0,115200 " \
184 "root=/dev/mtdblock0 " \
185 "mtdparts=atmel_nand:-(root) " \
186 "rw rootfstype=jffs2"
188 #else /* CONFIG_SYS_USE_NANDFLASH */
190 /* bootstrap + u-boot + env + linux in nandflash */
191 #define CONFIG_ENV_IS_IN_NAND
192 #define CONFIG_ENV_OFFSET 0xc0000
193 #define CONFIG_ENV_OFFSET_REDUND 0x100000
194 #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
195 #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
196 #define CONFIG_BOOTARGS \
197 "console=ttyS0,115200 earlyprintk " \
198 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
199 "256k(env),256k(env_redundant),256k(spare)," \
200 "512k(dtb),6M(kernel)ro,-(rootfs) " \
201 "root=/dev/mtdblock7 rw rootfstype=jffs2"
204 #define CONFIG_SYS_CBSIZE 256
205 #define CONFIG_SYS_MAXARGS 16
206 #define CONFIG_SYS_LONGHELP
207 #define CONFIG_CMDLINE_EDITING
208 #define CONFIG_AUTO_COMPLETE
211 * Size of malloc() pool
213 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)