2 * (C) Copyright 2007-2008
3 * Stelian Pop <stelian@popies.net>
4 * Lead Tech Design <www.leadtechdesign.com>
6 * Configuation settings for the AT91SAM9261EK board.
8 * SPDX-License-Identifier: GPL-2.0+
14 /* ARM asynchronous clock */
15 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
16 #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
18 #ifdef CONFIG_AT91SAM9G10
19 #define CONFIG_AT91SAM9G10EK /* It's an Atmel AT91SAM9G10 EK*/
21 #define CONFIG_AT91SAM9261EK /* It's an Atmel AT91SAM9261 EK*/
24 #include <asm/hardware.h>
26 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
27 #define CONFIG_SETUP_MEMORY_TAGS
28 #define CONFIG_INITRD_TAG
30 #define CONFIG_SKIP_LOWLEVEL_INIT
32 #define CONFIG_ATMEL_LEGACY
33 #define CONFIG_SYS_TEXT_BASE 0x21f00000
40 #define LCD_BPP LCD_COLOR8
41 #define CONFIG_LCD_LOGO
42 #undef LCD_TEST_PATTERN
43 #define CONFIG_LCD_INFO
44 #define CONFIG_LCD_INFO_BELOW_LOGO
45 #define CONFIG_ATMEL_LCD
46 #ifdef CONFIG_AT91SAM9261EK
47 #define CONFIG_ATMEL_LCD_BGR555
53 #define CONFIG_BOOTP_BOOTFILESIZE
54 #define CONFIG_BOOTP_BOOTPATH
55 #define CONFIG_BOOTP_GATEWAY
56 #define CONFIG_BOOTP_HOSTNAME
59 #define CONFIG_NR_DRAM_BANKS 1
60 #define CONFIG_SYS_SDRAM_BASE 0x20000000
61 #define CONFIG_SYS_SDRAM_SIZE 0x04000000
62 #define CONFIG_SYS_INIT_SP_ADDR \
63 (ATMEL_BASE_SRAM + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
66 #ifdef CONFIG_CMD_NAND
67 #define CONFIG_NAND_ATMEL
68 #define CONFIG_SYS_MAX_NAND_DEVICE 1
69 #define CONFIG_SYS_NAND_BASE 0x40000000
70 #define CONFIG_SYS_NAND_DBW_8
72 #define CONFIG_SYS_NAND_MASK_ALE (1 << 22)
74 #define CONFIG_SYS_NAND_MASK_CLE (1 << 21)
75 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
76 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC15
81 #define CONFIG_DRIVER_DM9000
82 #define CONFIG_DM9000_BASE 0x30000000
83 #define DM9000_IO CONFIG_DM9000_BASE
84 #define DM9000_DATA (CONFIG_DM9000_BASE + 4)
85 #define CONFIG_DM9000_USE_16BIT
86 #define CONFIG_DM9000_NO_SROM
87 #define CONFIG_NET_RETRY_COUNT 20
88 #define CONFIG_RESET_PHY_R
91 #define CONFIG_USB_ATMEL
92 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
93 #define CONFIG_USB_OHCI_NEW
94 #define CONFIG_SYS_USB_OHCI_CPU_INIT
95 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */
96 #ifdef CONFIG_AT91SAM9G10EK
97 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9g10"
99 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9261"
101 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
103 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
105 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
106 #define CONFIG_SYS_MEMTEST_END 0x23e00000
108 #ifdef CONFIG_SYS_USE_DATAFLASH_CS0
110 /* bootstrap + u-boot + env + linux in dataflash on CS0 */
111 #define CONFIG_ENV_OFFSET 0x4200
112 #define CONFIG_ENV_SIZE 0x4200
113 #define CONFIG_ENV_SECT_SIZE 0x210
114 #define CONFIG_ENV_SPI_MAX_HZ 15000000
115 #define CONFIG_BOOTCOMMAND "sf probe 0; " \
116 "sf read 0x22000000 0x84000 0x294000; " \
119 #elif CONFIG_SYS_USE_DATAFLASH_CS3
121 /* bootstrap + u-boot + env + linux in dataflash on CS3 */
122 #define CONFIG_ENV_OFFSET 0x4200
123 #define CONFIG_ENV_SIZE 0x4200
124 #define CONFIG_ENV_SECT_SIZE 0x210
125 #define CONFIG_ENV_SPI_MAX_HZ 15000000
126 #define CONFIG_BOOTCOMMAND "sf probe 0:3; " \
127 "sf read 0x22000000 0x84000 0x294000; " \
130 #else /* CONFIG_SYS_USE_NANDFLASH */
132 /* bootstrap + u-boot + env + linux in nandflash */
133 #define CONFIG_ENV_OFFSET 0x120000
134 #define CONFIG_ENV_OFFSET_REDUND 0x100000
135 #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
136 #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
139 #define CONFIG_SYS_LONGHELP
140 #define CONFIG_CMDLINE_EDITING
141 #define CONFIG_AUTO_COMPLETE
144 * Size of malloc() pool
146 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)