3 * Stelian Pop <stelian.pop <at> leadtechdesign.com>
4 * Lead Tech Design <www.leadtechdesign.com>
6 * Configuation settings for the AT91CAP9ADK board.
8 * See file CREDITS for list of people who contributed to this
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 /* ARM asynchronous clock */
31 #define AT91C_MAIN_CLOCK 200000000 /* from 12 MHz crystal */
32 #define AT91C_MASTER_CLOCK 100000000 /* peripheral = main / 2 */
33 #define CFG_HZ 1000000 /* 1us resolution */
35 #define AT91_SLOW_CLOCK 32768 /* slow clock */
37 #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
38 #define CONFIG_AT91CAP9 1 /* It's an Atmel AT91CAP9 SoC */
39 #define CONFIG_AT91CAP9ADK 1 /* on an AT91CAP9ADK Board */
40 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
42 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
43 #define CONFIG_SETUP_MEMORY_TAGS 1
44 #define CONFIG_INITRD_TAG 1
46 #define CONFIG_SKIP_LOWLEVEL_INIT
47 #define CONFIG_SKIP_RELOCATE_UBOOT
49 #define ROUND(A, B) (((A) + (B)) & ~((B) - 1))
51 * Size of malloc() pool
53 #define CFG_MALLOC_LEN ROUND(CFG_ENV_SIZE + 128*1024, 0x1000)
54 #define CFG_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
56 #define CONFIG_BAUDRATE 115200
62 #define CONFIG_ATMEL_USART 1
66 #define CONFIG_USART3 1 /* USART 3 is DBGU */
68 #define CONFIG_BOOTDELAY 3
69 #define CONFIG_BOOTARGS "console=ttyS0,115200 " \
70 "root=/dev/mtdblock1 rw rootfstype=jffs2"
72 /* #define CONFIG_ENV_OVERWRITE 1 */
77 #define CONFIG_BOOTP_BOOTFILESIZE 1
78 #define CONFIG_BOOTP_BOOTPATH 1
79 #define CONFIG_BOOTP_GATEWAY 1
80 #define CONFIG_BOOTP_HOSTNAME 1
83 * Command line configuration.
85 #include <config_cmd_default.h>
88 #undef CONFIG_CMD_AUTOSCRIPT
89 #undef CONFIG_CMD_FPGA
90 #undef CONFIG_CMD_LOADS
92 #define CONFIG_CMD_PING 1
93 #define CONFIG_CMD_DHCP 1
94 #define CONFIG_CMD_NAND 1
95 #define CONFIG_CMD_USB 1
97 /* SDRAM: Careful: this supposes an AT91CAP-MEM33 expansion card */
98 #define CONFIG_NR_DRAM_BANKS 1
99 #define PHYS_SDRAM 0x70000000
100 #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
103 #define CONFIG_HAS_DATAFLASH 1
104 #define CFG_SPI_WRITE_TOUT (5*CFG_HZ)
105 #define CFG_MAX_DATAFLASH_BANKS 1
106 #define CFG_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
107 #define CONFIG_NEW_PARTITION 1
110 #define CFG_FLASH_CFI 1
111 #define CFG_FLASH_CFI_DRIVER 1
112 #define PHYS_FLASH_1 0x10000000
113 #define CFG_FLASH_BASE PHYS_FLASH_1
114 #define CFG_MAX_FLASH_SECT 256
115 #define CFG_MAX_FLASH_BANKS 1
117 #define AT91C_FLASH_NWE_SETUP (4 << 0)
118 #define AT91C_FLASH_NCS_WR_SETUP (2 << 8)
119 #define AT91C_FLASH_NRD_SETUP (4 << 16)
120 #define AT91C_FLASH_NCS_RD_SETUP (2 << 24)
122 #define AT91C_FLASH_NWE_PULSE (8 << 0)
123 #define AT91C_FLASH_NCS_WR_PULSE (10 << 8)
124 #define AT91C_FLASH_NRD_PULSE (8 << 16)
125 #define AT91C_FLASH_NCS_RD_PULSE (10 << 24)
127 #define AT91C_FLASH_NWE_CYCLE (16 << 0)
128 #define AT91C_FLASH_NRD_CYCLE (16 << 16)
131 #define NAND_MAX_CHIPS 1
132 #define CFG_MAX_NAND_DEVICE 1
133 #define CFG_NAND_BASE 0x40000000
135 #define AT91C_SM_NWE_SETUP (2 << 0)
136 #define AT91C_SM_NCS_WR_SETUP (1 << 8)
137 #define AT91C_SM_NRD_SETUP (2 << 16)
138 #define AT91C_SM_NCS_RD_SETUP (1 << 24)
140 #define AT91C_SM_NWE_PULSE (4 << 0)
141 #define AT91C_SM_NCS_WR_PULSE (6 << 8)
142 #define AT91C_SM_NRD_PULSE (4 << 16)
143 #define AT91C_SM_NCS_RD_PULSE (6 << 24)
145 #define AT91C_SM_NWE_CYCLE (8 << 0)
146 #define AT91C_SM_NRD_CYCLE (8 << 16)
148 #define AT91C_SM_TDF (1 << 16)
151 #define CONFIG_MACB 1
152 #define CONFIG_RMII 1
153 #define CONFIG_NET_MULTI 1
154 #define CONFIG_NET_RETRY_COUNT 20
155 #define CONFIG_RESET_PHY_R 1
158 #define CONFIG_USB_OHCI_NEW 1
159 #define LITTLEENDIAN 1
160 #define CONFIG_DOS_PARTITION 1
161 #define CFG_USB_OHCI_CPU_INIT 1
162 #define CFG_USB_OHCI_REGS_BASE 0x00700000 /* AT91C_BASE_UHP */
163 #define CFG_USB_OHCI_SLOT_NAME "at91cap9"
164 #define CFG_USB_OHCI_MAX_ROOT_PORTS 2
167 #define CFG_LOAD_ADDR 0x72000000 /* load address */
169 #define CFG_MEMTEST_START PHYS_SDRAM
170 #define CFG_MEMTEST_END 0x73000000
172 #define CFG_USE_DATAFLASH 1
173 #undef CFG_USE_NORFLASH
175 #ifdef CFG_USE_DATAFLASH
177 /* bootstrap + u-boot + env + linux in dataflash */
178 #define CFG_ENV_IS_IN_DATAFLASH 1
179 #define CFG_MONITOR_BASE (CFG_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
180 #define CFG_ENV_OFFSET 0x4200
181 #define CFG_ENV_ADDR (CFG_DATAFLASH_LOGIC_ADDR_CS0 + CFG_ENV_OFFSET)
182 #define CFG_ENV_SIZE 0x4200
183 #define CONFIG_BOOTCOMMAND "cp.b 0xC003DE00 0x72000000 0x200040; bootm"
187 /* bootstrap + u-boot + env + linux in norflash */
188 #define CFG_ENV_IS_IN_FLASH 1
189 #define CFG_MONITOR_BASE (PHYS_FLASH_1 + 0x8000)
190 #define CFG_ENV_OFFSET 0x4000
191 #define CFG_ENV_ADDR (PHYS_FLASH_1 + CFG_ENV_OFFSET)
192 #define CFG_ENV_SIZE 0x4000
193 #define CONFIG_BOOTCOMMAND "cp.b 0x10040000 0x72000000 0x200000; bootm"
197 #define CFG_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
199 #define CFG_PROMPT "U-Boot> "
200 #define CFG_CBSIZE 256
201 #define CFG_MAXARGS 16
202 #define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
203 #define CFG_LONGHELP 1
204 #define CONFIG_CMDLINE_EDITING 1
206 #define CONFIG_STACKSIZE (32*1024) /* regular stack */
208 #ifdef CONFIG_USE_IRQ
209 #error CONFIG_USE_IRQ not supported