1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Configuration settings for the Sentec Cobra Board.
5 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
9 * configuration for ASTRO "Urmel" board.
10 * Originating from Cobra5272 configuration, messed up by
11 * Wolfgang Wegner <w.wegner@astro-kom.de>
12 * Please do not bother the original author with bug reports
13 * concerning this file.
16 #ifndef _CONFIG_ASTRO_MCF5373L_H
17 #define _CONFIG_ASTRO_MCF5373L_H
19 #include <linux/stringify.h>
22 * set the card type to actually compile for; either of
23 * the possibilities listed below has to be used!
35 #elif ASTRO_COFDMDUOS2
38 #error No card type defined!
42 * CONFIG_RAM defines if u-boot is loaded via BDM (or started from
43 * a different bootloader that has already performed RAM setup) or
44 * started directly from flash, which is the regular case for production
48 #define CONFIG_MONITOR_IS_IN_RAM
63 * Defines processor clock - important for correct timings concerning serial
67 #define CONFIG_SYS_CLK 80000000
68 #define CONFIG_SYS_CPU_CLK (CONFIG_SYS_CLK * 3)
69 #define CONFIG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */
71 #define CONFIG_SYS_CORE_SRAM_SIZE 0x8000
72 #define CONFIG_SYS_CORE_SRAM 0x80000000
74 #define CONFIG_SYS_UNIFY_CACHE
77 * Define baudrate for UART1 (console output, tftp, ...)
78 * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud
79 * CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected
80 * in u-boot command interface
83 #define CONFIG_SYS_UART_PORT (2)
84 #define CONFIG_SYS_UART2_ALT3_GPIO
87 * Watchdog configuration; Watchdog is disabled for running from RAM
88 * and set to highest possible value else. Beware there is no check
89 * in the watchdog code to validate the timeout value set here!
92 #ifndef CONFIG_MONITOR_IS_IN_RAM
93 #define CONFIG_WATCHDOG_TIMEOUT 3355 /* timeout in milliseconds */
97 * Configuration for environment
98 * Environment is located in the last sector of the flash
101 #ifndef CONFIG_MONITOR_IS_IN_RAM
104 * environment in RAM - This is used to use a single PC-based application
105 * to load an image, load U-Boot, load an environment and then start U-Boot
106 * to execute the commands from the environment. Feedback is done via setting
107 * and reading memory locations.
111 /* here we put our FPGA configuration... */
113 /* Define user parameters that have to be customized most likely */
115 /* AUTOBOOT settings - booting images automatically by u-boot after power on */
118 * The following settings will be contained in the environment block ; if you
119 * want to use a neutral environment all those settings can be manually set in
120 * u-boot: 'set' command
123 #define CONFIG_EXTRA_ENV_SETTINGS \
124 "loaderversion=11\0" \
125 "card_id="__stringify(ASTRO_ID)"\0" \
128 "xilinxload=imxtract 0x540000 $xilinxfile 0x41000000&&"\
129 "fpga load 0 0x41000000 $filesize\0" \
130 "alteraload=imxtract 0x6c0000 $alterafile 0x41000000&&"\
131 "fpga load 1 0x41000000 $filesize\0" \
133 "env_check=if test $env_default -eq 1;"\
134 " then setenv env_default 0;saveenv;fi\0"
137 * "update" is a non-standard command that has to be supplied
138 * by external update.c; This is not included in mainline because
139 * it needs non-blocking CFI routines.
142 #define CONFIG_FPGA_COUNT 1
143 #define CONFIG_SYS_FPGA_PROG_FEEDBACK
144 #define CONFIG_SYS_FPGA_WAIT 1000
146 /* End of user parameters to be customized */
148 /* Defines memory range for test */
151 * Low Level Configuration Settings
152 * (address mappings, register initial values, etc.)
153 * You should know what you are doing if you make changes here.
156 /* Base register address */
158 #define CONFIG_SYS_MBAR 0xFC000000 /* Register Base Addrs */
160 /* System Conf. Reg. & System Protection Reg. */
162 #define CONFIG_SYS_SCR 0x0003;
163 #define CONFIG_SYS_SPR 0xffff;
166 * Definitions for initial stack pointer and data area (in internal SRAM)
168 #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
169 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000
170 #define CONFIG_SYS_INIT_RAM_CTRL 0x221
171 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
172 GENERATED_GBL_DATA_SIZE)
173 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
176 * Start addresses for the final memory configuration
177 * (Set up by the startup code)
178 * for MCF5373, the allowable range is 0x40000000 to 0x7FF00000
180 #define CONFIG_SYS_SDRAM_BASE 0x40000000
183 * Chipselect bank definitions
185 * CS0 - Flash 32MB (first 16MB)
186 * CS1 - Flash 32MB (second half)
192 #define CONFIG_SYS_CS0_BASE 0
193 #define CONFIG_SYS_CS0_MASK 0x00ff0001
194 #define CONFIG_SYS_CS0_CTRL 0x00001fc0
196 #define CONFIG_SYS_CS1_BASE 0x01000000
197 #define CONFIG_SYS_CS1_MASK 0x00ff0001
198 #define CONFIG_SYS_CS1_CTRL 0x00001fc0
200 #define CONFIG_SYS_CS2_BASE 0x20000000
201 #define CONFIG_SYS_CS2_MASK 0x00ff0001
202 #define CONFIG_SYS_CS2_CTRL 0x0000fec0
204 #define CONFIG_SYS_CS3_BASE 0x21000000
205 #define CONFIG_SYS_CS3_MASK 0x00ff0001
206 #define CONFIG_SYS_CS3_CTRL 0x0000fec0
208 #define CONFIG_SYS_FLASH_BASE 0x00000000
210 #ifdef CONFIG_MONITOR_IS_IN_RAM
211 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
213 /* This is mainly used during relocation in start.S */
214 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
216 /* Reserve 256 kB for Monitor */
217 #define CONFIG_SYS_MONITOR_LEN (256 << 10)
219 #define CONFIG_SYS_BOOTPARAMS_LEN (64 * 1024)
222 * For booting Linux, the board info and command line data
223 * have to be in the first 8 MB of memory, since this is
224 * the maximum mapped by the Linux kernel during initialization ??
226 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + \
227 (CONFIG_SYS_SDRAM_SIZE << 20))
229 /* FLASH organization */
230 #define CONFIG_SYS_MAX_FLASH_BANKS 1
231 #define CONFIG_SYS_MAX_FLASH_SECT 259
232 #define CONFIG_SYS_FLASH_ERASE_TOUT 1000
234 #define CONFIG_SYS_FLASH_SIZE 0x2000000
235 #define CONFIG_SYS_FLASH_CFI_NONBLOCK 1
237 #define LDS_BOARD_TEXT \
238 . = DEFINED(env_offset) ? env_offset : .; \
239 env/embedded.o(.text*)
242 /* JFFS Partition offset set */
243 #define CONFIG_SYS_JFFS2_FIRST_BANK 0
244 #define CONFIG_SYS_JFFS2_NUM_BANKS 1
245 /* 512k reserved for u-boot */
246 #define CONFIG_SYS_JFFS2_FIRST_SECTOR 0x40
249 /* Cache Configuration */
251 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
252 CONFIG_SYS_INIT_RAM_SIZE - 8)
253 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
254 CONFIG_SYS_INIT_RAM_SIZE - 4)
255 #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINVA)
256 #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
257 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
258 CF_ACR_EN | CF_ACR_SM_ALL)
259 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \
262 #endif /* _CONFIG_ASTRO_MCF5373L_H */