1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Configuration settings for the Sentec Cobra Board.
5 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
9 * configuration for ASTRO "Urmel" board.
10 * Originating from Cobra5272 configuration, messed up by
11 * Wolfgang Wegner <w.wegner@astro-kom.de>
12 * Please do not bother the original author with bug reports
13 * concerning this file.
16 #ifndef _CONFIG_ASTRO_MCF5373L_H
17 #define _CONFIG_ASTRO_MCF5373L_H
19 #include <linux/stringify.h>
22 * set the card type to actually compile for; either of
23 * the possibilities listed below has to be used!
25 #define CONFIG_ASTRO_V532 1
29 #elif CONFIG_ASTRO_V512
31 #elif CONFIG_ASTRO_TWIN7S2
33 #elif CONFIG_ASTRO_V912
35 #elif CONFIG_ASTRO_COFDMDUOS2
38 #error No card type defined!
42 * CONFIG_RAM defines if u-boot is loaded via BDM (or started from
43 * a different bootloader that has already performed RAM setup) or
44 * started directly from flash, which is the regular case for production
48 #define CONFIG_MONITOR_IS_IN_RAM
61 #define CONFIG_SYS_I2C
62 #define CONFIG_SYS_I2C_FSL
63 #define CONFIG_SYS_FSL_I2C_SPEED 80000
64 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
65 #define CONFIG_SYS_FSL_I2C_OFFSET 0x58000
66 #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
69 * Defines processor clock - important for correct timings concerning serial
73 #define CONFIG_SYS_CLK 80000000
74 #define CONFIG_SYS_CPU_CLK (CONFIG_SYS_CLK * 3)
75 #define CONFIG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */
77 #define CONFIG_SYS_CORE_SRAM_SIZE 0x8000
78 #define CONFIG_SYS_CORE_SRAM 0x80000000
80 #define CONFIG_SYS_UNIFY_CACHE
83 * Define baudrate for UART1 (console output, tftp, ...)
84 * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud
85 * CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected
86 * in u-boot command interface
89 #define CONFIG_MCFUART
90 #define CONFIG_SYS_UART_PORT (2)
91 #define CONFIG_SYS_UART2_ALT3_GPIO
94 * Watchdog configuration; Watchdog is disabled for running from RAM
95 * and set to highest possible value else. Beware there is no check
96 * in the watchdog code to validate the timeout value set here!
99 #ifndef CONFIG_MONITOR_IS_IN_RAM
100 #define CONFIG_WATCHDOG
101 #define CONFIG_WATCHDOG_TIMEOUT 3355 /* timeout in milliseconds */
105 * Configuration for environment
106 * Environment is located in the last sector of the flash
109 #ifndef CONFIG_MONITOR_IS_IN_RAM
112 * environment in RAM - This is used to use a single PC-based application
113 * to load an image, load U-Boot, load an environment and then start U-Boot
114 * to execute the commands from the environment. Feedback is done via setting
115 * and reading memory locations.
119 /* here we put our FPGA configuration... */
121 /* Define user parameters that have to be customized most likely */
123 /* AUTOBOOT settings - booting images automatically by u-boot after power on */
126 * The following settings will be contained in the environment block ; if you
127 * want to use a neutral environment all those settings can be manually set in
128 * u-boot: 'set' command
131 #define CONFIG_EXTRA_ENV_SETTINGS \
132 "loaderversion=11\0" \
133 "card_id="__stringify(ASTRO_ID)"\0" \
136 "xilinxload=imxtract 0x540000 $xilinxfile 0x41000000&&"\
137 "fpga load 0 0x41000000 $filesize\0" \
138 "alteraload=imxtract 0x6c0000 $alterafile 0x41000000&&"\
139 "fpga load 1 0x41000000 $filesize\0" \
141 "env_check=if test $env_default -eq 1;"\
142 " then setenv env_default 0;saveenv;fi\0"
145 * "update" is a non-standard command that has to be supplied
146 * by external update.c; This is not included in mainline because
147 * it needs non-blocking CFI routines.
149 #ifdef CONFIG_MONITOR_IS_IN_RAM
150 #define CONFIG_BOOTCOMMAND "" /* no autoboot in this case */
152 #if CONFIG_ASTRO_V532
153 #define CONFIG_BOOTCOMMAND "protect off 0x80000 0x1ffffff;run env_check;"\
154 "run xilinxload&&run alteraload&&bootm 0x80000;"\
157 #define CONFIG_BOOTCOMMAND "protect off 0x80000 0x1ffffff;run env_check;"\
158 "run xilinxload&&bootm 0x80000;update;reset"
162 /* default RAM address for user programs */
163 #define CONFIG_SYS_LOAD_ADDR 0x20000
165 #define CONFIG_FPGA_COUNT 1
166 #define CONFIG_SYS_FPGA_PROG_FEEDBACK
167 #define CONFIG_SYS_FPGA_WAIT 1000
169 /* End of user parameters to be customized */
171 /* Defines memory range for test */
174 * Low Level Configuration Settings
175 * (address mappings, register initial values, etc.)
176 * You should know what you are doing if you make changes here.
179 /* Base register address */
181 #define CONFIG_SYS_MBAR 0xFC000000 /* Register Base Addrs */
183 /* System Conf. Reg. & System Protection Reg. */
185 #define CONFIG_SYS_SCR 0x0003;
186 #define CONFIG_SYS_SPR 0xffff;
189 * Definitions for initial stack pointer and data area (in internal SRAM)
191 #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
192 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000
193 #define CONFIG_SYS_INIT_RAM_CTRL 0x221
194 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
195 GENERATED_GBL_DATA_SIZE)
196 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
199 * Start addresses for the final memory configuration
200 * (Set up by the startup code)
201 * for MCF5373, the allowable range is 0x40000000 to 0x7FF00000
203 #define CONFIG_SYS_SDRAM_BASE 0x40000000
206 * Chipselect bank definitions
208 * CS0 - Flash 32MB (first 16MB)
209 * CS1 - Flash 32MB (second half)
215 #define CONFIG_SYS_CS0_BASE 0
216 #define CONFIG_SYS_CS0_MASK 0x00ff0001
217 #define CONFIG_SYS_CS0_CTRL 0x00001fc0
219 #define CONFIG_SYS_CS1_BASE 0x01000000
220 #define CONFIG_SYS_CS1_MASK 0x00ff0001
221 #define CONFIG_SYS_CS1_CTRL 0x00001fc0
223 #define CONFIG_SYS_CS2_BASE 0x20000000
224 #define CONFIG_SYS_CS2_MASK 0x00ff0001
225 #define CONFIG_SYS_CS2_CTRL 0x0000fec0
227 #define CONFIG_SYS_CS3_BASE 0x21000000
228 #define CONFIG_SYS_CS3_MASK 0x00ff0001
229 #define CONFIG_SYS_CS3_CTRL 0x0000fec0
231 #define CONFIG_SYS_FLASH_BASE 0x00000000
233 #ifdef CONFIG_MONITOR_IS_IN_RAM
234 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
236 /* This is mainly used during relocation in start.S */
237 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
239 /* Reserve 256 kB for Monitor */
240 #define CONFIG_SYS_MONITOR_LEN (256 << 10)
242 #define CONFIG_SYS_BOOTPARAMS_LEN (64 * 1024)
243 /* Reserve 128 kB for malloc() */
244 #define CONFIG_SYS_MALLOC_LEN (128 << 10)
247 * For booting Linux, the board info and command line data
248 * have to be in the first 8 MB of memory, since this is
249 * the maximum mapped by the Linux kernel during initialization ??
251 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + \
252 (CONFIG_SYS_SDRAM_SIZE << 20))
254 /* FLASH organization */
255 #define CONFIG_SYS_MAX_FLASH_BANKS 1
256 #define CONFIG_SYS_MAX_FLASH_SECT 259
257 #define CONFIG_SYS_FLASH_ERASE_TOUT 1000
259 #define CONFIG_SYS_FLASH_SIZE 0x2000000
260 #define CONFIG_SYS_FLASH_CFI_NONBLOCK 1
262 #define LDS_BOARD_TEXT \
263 . = DEFINED(env_offset) ? env_offset : .; \
264 env/embedded.o(.text*)
267 /* JFFS Partition offset set */
268 #define CONFIG_SYS_JFFS2_FIRST_BANK 0
269 #define CONFIG_SYS_JFFS2_NUM_BANKS 1
270 /* 512k reserved for u-boot */
271 #define CONFIG_SYS_JFFS2_FIRST_SECTOR 0x40
274 /* Cache Configuration */
275 #define CONFIG_SYS_CACHELINE_SIZE 16
277 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
278 CONFIG_SYS_INIT_RAM_SIZE - 8)
279 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
280 CONFIG_SYS_INIT_RAM_SIZE - 4)
281 #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINVA)
282 #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
283 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
284 CF_ACR_EN | CF_ACR_SM_ALL)
285 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \
288 #endif /* _CONFIG_ASTRO_MCF5373L_H */