4 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
7 * Copyright (C) 2012 Freescale Semiconductor, Inc.
9 * Configuration settings for the Freescale i.MX6Q SabreSD board.
11 * SPDX-License-Identifier: GPL-2.0+
13 #ifndef __ARISTAINETOS_COMMON_CONFIG_H
14 #define __ARISTAINETOS_COMMON_CONFIG_H
16 #include "mx6_common.h"
18 #define CONFIG_MACH_TYPE 4501
19 #define CONFIG_MMCROOT "/dev/mmcblk0p1"
21 /* Size of malloc() pool */
22 #define CONFIG_SYS_MALLOC_LEN (64 * SZ_1M)
24 #define CONFIG_MXC_UART
27 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
29 #define CONFIG_FEC_MXC
31 #define IMX_FEC_BASE ENET_BASE_ADDR
32 #define CONFIG_ETHPRIME "FEC"
33 #define CONFIG_FEC_MXC_PHYADDR 0
35 #define CONFIG_SPI_FLASH_MTD
36 #define CONFIG_MXC_SPI
37 #define CONFIG_SF_DEFAULT_SPEED 20000000
38 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
39 #define CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
41 #define CONFIG_EXTRA_ENV_SETTINGS \
42 "script=u-boot.scr\0" \
43 "fit_file=/boot/system.itb\0" \
44 "loadaddr=0x12000000\0" \
45 "fit_addr_r=0x14000000\0" \
46 "uboot=/boot/u-boot.imx\0" \
48 "rescue_sys_addr=f0000\0" \
49 "rescue_sys_length=f10000\0" \
52 "console=" CONSOLE_DEV "\0" \
53 "fdt_high=0xffffffff\0" \
54 "initrd_high=0xffffffff\0" \
55 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
56 "set_fit_default=fdt addr ${fit_addr_r};fdt set /configurations " \
57 "default ${board_type}\0" \
58 "get_env=mw ${loadaddr} 0 0x20000;" \
60 "ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} env.txt;" \
61 "env import -t ${loadaddr}\0" \
62 "default_env=mw ${loadaddr} 0 0x20000;" \
63 "env export -t ${loadaddr} serial# ethaddr eth1addr " \
66 "env import -t ${loadaddr}\0" \
68 "ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
69 "bootscript=echo Running bootscript from mmc ...; " \
73 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
74 "mmcargs=setenv bootargs console=${console},${baudrate} " \
76 "mmcboot=echo Booting from mmc ...; " \
77 "run mmcargs addmtd addmisc set_fit_default;" \
78 "bootm ${fit_addr_r}\0" \
79 "mmc_load_fit=ext2load mmc ${mmcdev}:${mmcpart} ${fit_addr_r} " \
81 "mmc_load_uboot=ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \
83 "mmc_upd_uboot=mw.b ${loadaddr} 0xff ${uboot_sz};" \
84 "setexpr cmp_buf ${loadaddr} + ${uboot_sz};" \
85 "setexpr uboot_maxsize ${uboot_sz} - 400;" \
86 "mw.b ${cmp_buf} 0x00 ${uboot_sz};" \
87 "run mmc_load_uboot;sf probe;sf erase 0 ${uboot_sz};" \
88 "sf write ${loadaddr} 400 ${filesize};" \
89 "sf read ${cmp_buf} 400 ${uboot_sz};" \
90 "cmp.b ${loadaddr} ${cmp_buf} ${uboot_maxsize}\0" \
91 "ubiboot=echo Booting from ubi ...; " \
92 "run ubiargs addmtd addmisc set_fit_default;" \
93 "bootm ${fit_addr_r}\0" \
94 "rescueargs=setenv bootargs console=${console},${baudrate} " \
95 "root=/dev/ram rw\0 " \
96 "rescueboot=echo Booting rescue system from NOR ...; " \
97 "run rescueargs addmtd addmisc set_fit_default;" \
98 "bootm ${fit_addr_r}\0" \
99 "rescue_load_fit=sf probe;sf read ${fit_addr_r} ${rescue_sys_addr} " \
100 "${rescue_sys_length}; imi ${fit_addr_r}\0" \
101 CONFIG_EXTRA_ENV_BOARD_SETTINGS
103 #define CONFIG_BOOTCOMMAND \
104 "mmc dev ${mmcdev};" \
105 "if mmc rescan; then " \
106 "if run loadbootscript; then " \
109 "if run mmc_load_fit; then " \
112 "if run ubifs_load_fit; then " \
115 "if run rescue_load_fit; then " \
118 "echo RESCUE SYSTEM BOOT " \
125 "if run ubifs_load_fit; then " \
128 "if run rescue_load_fit; then " \
131 "echo RESCUE SYSTEM BOOT FAILURE;" \
136 #define CONFIG_ARP_TIMEOUT 200UL
138 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
139 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
140 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
142 /* Physical Memory Map */
143 #define CONFIG_NR_DRAM_BANKS 1
144 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
146 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
147 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
148 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
150 #define CONFIG_SYS_INIT_SP_OFFSET \
151 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
152 #define CONFIG_SYS_INIT_SP_ADDR \
153 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
155 /* Environment organization */
156 #define CONFIG_ENV_SIZE (12 * 1024)
157 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
158 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
159 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
160 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
161 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
162 #define CONFIG_ENV_SECT_SIZE (0x010000)
163 #define CONFIG_ENV_OFFSET (0x0d0000)
164 #define CONFIG_ENV_OFFSET_REDUND (0x0e0000)
166 #define CONFIG_SYS_FSL_USDHC_NUM 2
169 #define CONFIG_SYS_I2C
170 #define CONFIG_SYS_I2C_MXC
171 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
172 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
173 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
174 #define CONFIG_SYS_I2C_SPEED 100000
175 #define CONFIG_SYS_I2C_SLAVE 0x7f
176 #define CONFIG_SYS_I2C_NOPROBES { {0, 0x00} }
179 #define CONFIG_SYS_MAX_NAND_DEVICE 1
180 #define CONFIG_SYS_NAND_BASE 0x40000000
181 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
182 #define CONFIG_SYS_NAND_ONFI_DETECTION
184 /* DMA stuff, needed for GPMI/MXS NAND support */
187 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
188 #define CONFIG_SYS_RTC_BUS_NUM 2
189 #define CONFIG_RTC_M41T11
192 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
193 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
194 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
195 #define CONFIG_MXC_USB_FLAGS 0
198 #define CONFIG_MTD_PARTITIONS
199 #define CONFIG_MTD_DEVICE
201 #define CONFIG_HW_WATCHDOG
202 #define CONFIG_IMX_WATCHDOG
205 #define CONFIG_VIDEO_IPUV3
206 /* check this console not needed, after test remove it */
207 #define CONFIG_VIDEO_BMP_RLE8
208 #define CONFIG_SPLASH_SCREEN
209 #define CONFIG_SPLASH_SCREEN_ALIGN
210 #define CONFIG_BMP_16BPP
211 #define CONFIG_VIDEO_LOGO
212 #define CONFIG_VIDEO_BMP_LOGO
213 #define CONFIG_IMX_VIDEO_SKIP
215 #define CONFIG_PWM_IMX
216 #define CONFIG_IMX6_PWM_PER_CLK 66000000
218 #endif /* __ARISTAINETOS_COMMON_CONFIG_H */