1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * Configuration settings for the Armadeus Project motherboard APF27
6 * Copyright (C) 2008-2013 Eric Jarrige <eric.jarrige@armadeus.org>
12 #include <linux/stringify.h>
14 #define CONFIG_ENV_VERSION 10
15 #define CONFIG_BOARD_NAME apf27
20 #define CONFIG_MX27 /* This is a Freescale i.MX27 Chip */
21 #define CONFIG_MACH_TYPE 1698 /* APF27 */
24 * Enable the call to miscellaneous platform dependent initialization.
30 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
31 #define CONFIG_SPL_MAX_SIZE 2048
33 /* NAND boot config */
34 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
35 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x800
36 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
37 #define CONFIG_SYS_NAND_U_BOOT_SIZE CONFIG_SYS_MONITOR_LEN - 0x800
42 #define CONFIG_BOOTP_BOOTFILESIZE
44 #define CONFIG_HOSTNAME "apf27"
45 #define CONFIG_ROOTPATH "/tftpboot/" __stringify(CONFIG_BOARD_NAME) "-root"
48 * Memory configurations
50 #define CONFIG_NR_DRAM_POPULATED 1
52 #define ACFG_SDRAM_MBYTE_SYZE 64
54 #define PHYS_SDRAM_1 0xA0000000
55 #define PHYS_SDRAM_2 0xB0000000
56 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
57 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (512<<10))
59 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE \
60 + PHYS_SDRAM_1_SIZE - 0x0100000)
65 #define ACFG_MONITOR_OFFSET 0x00000000
66 #define CONFIG_SYS_MONITOR_LEN 0x00100000 /* 1MiB */
67 #define CONFIG_ENV_OVERWRITE
68 #define CONFIG_ENV_RANGE 0X00080000 /* 512kB */
69 #define CONFIG_FIRMWARE_OFFSET 0x00200000
70 #define CONFIG_FIRMWARE_SIZE 0x00080000 /* 512kB */
71 #define CONFIG_KERNEL_OFFSET 0x00300000
72 #define CONFIG_ROOTFS_OFFSET 0x00800000
75 * U-Boot general configurations
77 #define CONFIG_SYS_CBSIZE 2048 /* console I/O buffer */
78 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
79 /* Boot argument buffer size */
84 #define CONFIG_CMDLINE_TAG /* send commandline to Kernel */
85 #define CONFIG_SETUP_MEMORY_TAGS /* send memory definition to kernel */
86 #define CONFIG_INITRD_TAG /* send initrd params */
88 #define CONFIG_BOOTFILE __stringify(CONFIG_BOARD_NAME) "-linux.bin"
90 #define ACFG_CONSOLE_DEV ttySMX0
91 #define CONFIG_BOOTCOMMAND "run ubifsboot"
92 #define CONFIG_SYS_AUTOLOAD "no"
94 * Default load address for user programs and kernel
96 #define CONFIG_LOADADDR 0xA0000000
97 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
102 #define CONFIG_EXTRA_ENV_SETTINGS \
103 "env_version=" __stringify(CONFIG_ENV_VERSION) "\0" \
104 "consoledev=" __stringify(ACFG_CONSOLE_DEV) "\0" \
105 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
106 "partition=nand0,6\0" \
107 "u-boot_addr=" __stringify(ACFG_MONITOR_OFFSET) "\0" \
108 "env_addr=" __stringify(CONFIG_ENV_OFFSET) "\0" \
109 "firmware_addr=" __stringify(CONFIG_FIRMWARE_OFFSET) "\0" \
110 "firmware_size=" __stringify(CONFIG_FIRMWARE_SIZE) "\0" \
111 "kernel_addr=" __stringify(CONFIG_KERNEL_OFFSET) "\0" \
112 "rootfs_addr=" __stringify(CONFIG_ROOTFS_OFFSET) "\0" \
113 "board_name=" __stringify(CONFIG_BOARD_NAME) "\0" \
114 "kernel_addr_r=A0000000\0" \
115 "check_env=if test -n ${flash_env_version}; " \
116 "then env default env_version; " \
117 "else env set flash_env_version ${env_version}; env save; "\
119 "if itest ${flash_env_version} < ${env_version}; then " \
120 "echo \"*** Warning - Environment version" \
121 " change suggests: run flash_reset_env; reset\"; "\
122 "env default flash_reset_env; "\
124 "check_flash=nand lock; nand unlock ${env_addr}; \0" \
125 "flash_reset_env=env default -f -a; saveenv; run update_env;" \
126 "echo Flash environment variables erased!\0" \
127 "download_uboot=tftpboot ${loadaddr} ${board_name}" \
128 "-u-boot-with-spl.bin\0" \
129 "flash_uboot=nand unlock ${u-boot_addr} ;" \
130 "nand erase.part u-boot;" \
131 "if nand write.trimffs ${fileaddr} ${u-boot_addr} ${filesize};"\
132 "then nand lock; nand unlock ${env_addr};" \
133 "echo Flashing of uboot succeed;" \
134 "else echo Flashing of uboot failed;" \
136 "update_uboot=run download_uboot flash_uboot\0" \
137 "download_env=tftpboot ${loadaddr} ${board_name}" \
138 "-u-boot-env.txt\0" \
139 "flash_env=env import -t ${loadaddr}; env save; \0" \
140 "update_env=run download_env flash_env\0" \
141 "update_all=run update_env update_uboot\0" \
142 "unlock_regs=mw 10000008 0; mw 10020008 0\0" \
147 #define CONFIG_MXC_UART
148 #define CONFIG_MXC_UART_BASE UART1_BASE
158 #define CONFIG_MXC_NAND_REGS_BASE 0xD8000000
159 #define CONFIG_SYS_NAND_BASE CONFIG_MXC_NAND_REGS_BASE
160 #define CONFIG_SYS_MAX_NAND_DEVICE 1
162 #define CONFIG_MXC_NAND_HWECC
163 #define CONFIG_SYS_NAND_LARGEPAGE
164 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
165 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
166 #define CONFIG_SYS_NAND_PAGE_COUNT CONFIG_SYS_NAND_BLOCK_SIZE / \
167 CONFIG_SYS_NAND_PAGE_SIZE
168 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024)
169 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 11
170 #define NAND_MAX_CHIPS 1
172 #define CONFIG_FLASH_SHOW_PROGRESS 45
173 #define CONFIG_SYS_NAND_QUIET 1
176 * Partitions & Filsystems
180 * Ethernet (on SOC imx FEC)
182 #define CONFIG_FEC_MXC
183 #define CONFIG_FEC_MXC_PHYADDR 0x1f
188 #define CONFIG_FPGA_COUNT 1
189 #define CONFIG_SYS_FPGA_WAIT 250 /* 250 ms */
190 #define CONFIG_SYS_FPGA_PROG_FEEDBACK
191 #define CONFIG_SYS_FPGA_CHECK_CTRLC
192 #define CONFIG_SYS_FPGA_CHECK_ERROR
197 #ifdef CONFIG_CMD_IMX_FUSE
198 #define IIM_MAC_BANK 0
199 #define IIM_MAC_ROW 5
200 #define IIM0_SCC_KEY 11
208 #ifdef CONFIG_CMD_I2C
209 #define CONFIG_SYS_I2C
210 #define CONFIG_SYS_I2C_MXC
211 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
212 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
213 #define CONFIG_SYS_MXC_I2C1_SPEED 100000 /* 100 kHz */
214 #define CONFIG_SYS_MXC_I2C1_SLAVE 0x7F
215 #define CONFIG_SYS_MXC_I2C2_SPEED 100000 /* 100 kHz */
216 #define CONFIG_SYS_MXC_I2C2_SLAVE 0x7F
217 #define CONFIG_SYS_I2C_NOPROBES { }
219 #ifdef CONFIG_CMD_EEPROM
220 # define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM 24LC02 */
221 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
222 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
223 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* msec */
224 #endif /* CONFIG_CMD_EEPROM */
225 #endif /* CONFIG_CMD_I2C */
230 #ifdef CONFIG_CMD_MMC
231 #define CONFIG_MXC_MCI_REGS_BASE 0x10014000
237 #ifdef CONFIG_CMD_DATE
238 #define CONFIG_RTC_DS1374
239 #define CONFIG_SYS_RTC_BUS_NUM 0
240 #endif /* CONFIG_CMD_DATE */
245 * 31 | x |x| x x x x |x x x x x x x x x x |x x|x x x x|x x x x x x x x x x| 0
246 * |CPLM|X|----PD---|--------MFD---------|XXX|--MFI--|-----MFN-----------|
248 #define CONFIG_MX27_CLK32 32768 /* 32768 or 32000 Hz crystal */
250 #if (ACFG_SDRAM_MBYTE_SYZE == 64) /* micron MT46H16M32LF -6 */
252 #define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
253 #define PHYS_SDRAM_2_SIZE 0x04000000 /* 64 MB */
256 #if (ACFG_SDRAM_MBYTE_SYZE == 128)
258 #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
259 #define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */
262 #if (ACFG_SDRAM_MBYTE_SYZE == 256)
264 #define PHYS_SDRAM_1_SIZE 0x10000000 /* 256 MB */
265 #define PHYS_SDRAM_2_SIZE 0x10000000 /* 256 MB */
268 #endif /* __CONFIG_H */