include/configs/apf27.h

   1 /*
   2  *
   3  * Configuration settings for the Armadeus Project motherboard APF27
   4  *
   5  * Copyright (C) 2008-2013 Eric Jarrige <eric.jarrige@armadeus.org>
   6  *
   7  * SPDX-License-Identifier:    GPL-2.0+
   8  */
   9
  10 #ifndef __CONFIG_H
  11 #define __CONFIG_H
  12
  13 #define CONFIG_ENV_VERSION      10
  14 #define CONFIG_BOARD_NAME apf27
  15
  16 /*
  17  * SoC configurations
  18  */
  19 #define CONFIG_MX27                     /* This is a Freescale i.MX27 Chip */
  20 #define CONFIG_MACH_TYPE        1698    /* APF27 */
  21
  22 /*
  23  * Enable the call to miscellaneous platform dependent initialization.
  24  */
  25
  26 /*
  27  * SPL
  28  */
  29 #define CONFIG_SPL_TARGET       "u-boot-with-spl.bin"
  30 #define CONFIG_SPL_MAX_SIZE     2048
  31 #define CONFIG_SPL_TEXT_BASE    0xA0000000
  32
  33 /* NAND boot config */
  34 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
  35 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x800
  36 #define CONFIG_SYS_NAND_U_BOOT_DST      CONFIG_SYS_TEXT_BASE
  37 #define CONFIG_SYS_NAND_U_BOOT_SIZE     CONFIG_SYS_MONITOR_LEN - 0x800
  38
  39 /*
  40  * BOOTP options
  41  */
  42 #define CONFIG_BOOTP_SUBNETMASK
  43 #define CONFIG_BOOTP_GATEWAY
  44 #define CONFIG_BOOTP_HOSTNAME
  45 #define CONFIG_BOOTP_BOOTPATH
  46 #define CONFIG_BOOTP_BOOTFILESIZE
  47 #define CONFIG_BOOTP_DNS
  48 #define CONFIG_BOOTP_DNS2
  49
  50 #define CONFIG_HOSTNAME CONFIG_BOARD_NAME
  51 #define CONFIG_ROOTPATH "/tftpboot/" __stringify(CONFIG_BOARD_NAME) "-root"
  52
  53 /*
  54  * Memory configurations
  55  */
  56 #define CONFIG_NR_DRAM_POPULATED 1
  57 #define CONFIG_NR_DRAM_BANKS    2
  58
  59 #define ACFG_SDRAM_MBYTE_SYZE 64
  60
  61 #define PHYS_SDRAM_1                    0xA0000000
  62 #define PHYS_SDRAM_2                    0xB0000000
  63 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
  64 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (512<<10))
  65 #define CONFIG_SYS_MEMTEST_START        0xA0000000      /* memtest test area  */
  66 #define CONFIG_SYS_MEMTEST_END          0xA0300000      /* 3 MiB RAM test */
  67
  68 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE  \
  69                 + PHYS_SDRAM_1_SIZE - 0x0100000)
  70
  71 #define CONFIG_SYS_TEXT_BASE            0xA0000800
  72
  73 /*
  74  * FLASH organization
  75  */
  76 #define ACFG_MONITOR_OFFSET             0x00000000
  77 #define CONFIG_SYS_MONITOR_LEN          0x00100000      /* 1MiB */
  78 #define CONFIG_ENV_OVERWRITE
  79 #define CONFIG_ENV_OFFSET               0x00100000      /* NAND offset */
  80 #define CONFIG_ENV_SIZE                 0x00020000      /* 128kB  */
  81 #define CONFIG_ENV_RANGE                0X00080000      /* 512kB */
  82 #define CONFIG_ENV_OFFSET_REDUND        \
  83                 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)  /* +512kB */
  84 #define CONFIG_ENV_SIZE_REDUND          CONFIG_ENV_SIZE /* 512kB */
  85 #define CONFIG_FIRMWARE_OFFSET          0x00200000
  86 #define CONFIG_FIRMWARE_SIZE            0x00080000      /* 512kB  */
  87 #define CONFIG_KERNEL_OFFSET            0x00300000
  88 #define CONFIG_ROOTFS_OFFSET            0x00800000
  89
  90 #define CONFIG_MTDMAP                   "mxc_nand.0"
  91 #define MTDIDS_DEFAULT                  "nand0=" CONFIG_MTDMAP
  92 #define MTDPARTS_DEFAULT        "mtdparts=" CONFIG_MTDMAP \
  93                                 ":1M(u-boot)ro," \
  94                                 "512K(env)," \
  95                                 "512K(env2)," \
  96                                 "512K(firmware)," \
  97                                 "512K(dtb)," \
  98                                 "5M(kernel)," \
  99                                 "-(rootfs)"
 100
 101 /*
 102  * U-Boot general configurations
 103  */
 104 #define CONFIG_SYS_LONGHELP
 105 #define CONFIG_SYS_CBSIZE               2048            /* console I/O buffer */
 106 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 107                                                 /* Boot argument buffer size */
 108 #define CONFIG_AUTO_COMPLETE
 109 #define CONFIG_CMDLINE_EDITING
 110 #define CONFIG_ENV_VARS_UBOOT_CONFIG
 111 #define CONFIG_PREBOOT                  "run check_flash check_env;"
 112
 113 /*
 114  * Boot Linux
 115  */
 116 #define CONFIG_CMDLINE_TAG              /* send commandline to Kernel   */
 117 #define CONFIG_SETUP_MEMORY_TAGS        /* send memory definition to kernel */
 118 #define CONFIG_INITRD_TAG               /* send initrd params   */
 119
 120 #define CONFIG_BOOTFILE         __stringify(CONFIG_BOARD_NAME) "-linux.bin"
 121
 122 #define ACFG_CONSOLE_DEV        ttySMX0
 123 #define CONFIG_BOOTCOMMAND      "run ubifsboot"
 124 #define CONFIG_SYS_AUTOLOAD     "no"
 125 /*
 126  * Default load address for user programs and kernel
 127  */
 128 #define CONFIG_LOADADDR                 0xA0000000
 129 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
 130
 131 /*
 132  * Extra Environments
 133  */
 134 #define CONFIG_EXTRA_ENV_SETTINGS \
 135         "env_version="          __stringify(CONFIG_ENV_VERSION)         "\0" \
 136         "consoledev="           __stringify(ACFG_CONSOLE_DEV)           "\0" \
 137         "mtdparts="             MTDPARTS_DEFAULT                        "\0" \
 138         "partition=nand0,6\0"                                           \
 139         "u-boot_addr="          __stringify(ACFG_MONITOR_OFFSET)        "\0" \
 140         "env_addr="             __stringify(CONFIG_ENV_OFFSET)          "\0" \
 141         "firmware_addr="        __stringify(CONFIG_FIRMWARE_OFFSET)     "\0" \
 142         "firmware_size="        __stringify(CONFIG_FIRMWARE_SIZE)       "\0" \
 143         "kernel_addr="          __stringify(CONFIG_KERNEL_OFFSET)       "\0" \
 144         "rootfs_addr="          __stringify(CONFIG_ROOTFS_OFFSET)       "\0" \
 145         "board_name="           __stringify(CONFIG_BOARD_NAME)          "\0" \
 146         "kernel_addr_r=A0000000\0" \
 147         "check_env=if test -n ${flash_env_version}; "                   \
 148                 "then env default env_version; "                        \
 149                 "else env set flash_env_version ${env_version}; env save; "\
 150                 "fi; "                                                  \
 151                 "if itest ${flash_env_version} < ${env_version}; then " \
 152                         "echo \"*** Warning - Environment version"      \
 153                         " change suggests: run flash_reset_env; reset\"; "\
 154                         "env default flash_reset_env; "\
 155                 "fi; \0"                                                \
 156         "check_flash=nand lock; nand unlock ${env_addr}; \0"    \
 157         "flash_reset_env=env default -f -a; saveenv; run update_env;"   \
 158                 "echo Flash environment variables erased!\0"            \
 159         "download_uboot=tftpboot ${loadaddr} ${board_name}"             \
 160                 "-u-boot-with-spl.bin\0"                                \
 161         "flash_uboot=nand unlock ${u-boot_addr} ;"                      \
 162                 "nand erase.part u-boot;"               \
 163                 "if nand write.trimffs ${fileaddr} ${u-boot_addr} ${filesize};"\
 164                         "then nand lock; nand unlock ${env_addr};"      \
 165                                 "echo Flashing of uboot succeed;"       \
 166                         "else echo Flashing of uboot failed;"           \
 167                 "fi; \0"                                                \
 168         "update_uboot=run download_uboot flash_uboot\0"                 \
 169         "download_env=tftpboot ${loadaddr} ${board_name}"               \
 170                 "-u-boot-env.txt\0"                             \
 171         "flash_env=env import -t ${loadaddr}; env save; \0"             \
 172         "update_env=run download_env flash_env\0"                       \
 173         "update_all=run update_env update_uboot\0"                      \
 174         "unlock_regs=mw 10000008 0; mw 10020008 0\0"                    \
 175
 176 /*
 177  * Serial Driver
 178  */
 179 #define CONFIG_MXC_UART
 180 #define CONFIG_CONS_INDEX               1
 181 #define CONFIG_MXC_UART_BASE            UART1_BASE
 182
 183 /*
 184  * GPIO
 185  */
 186 #define CONFIG_MXC_GPIO
 187
 188 /*
 189  * NOR
 190  */
 191
 192 /*
 193  * NAND
 194  */
 195
 196 #define CONFIG_MXC_NAND_REGS_BASE       0xD8000000
 197 #define CONFIG_SYS_NAND_BASE            CONFIG_MXC_NAND_REGS_BASE
 198 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 199
 200 #define CONFIG_MXC_NAND_HWECC
 201 #define CONFIG_SYS_NAND_LARGEPAGE
 202 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
 203 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128 * 1024)
 204 #define CONFIG_SYS_NAND_PAGE_COUNT      CONFIG_SYS_NAND_BLOCK_SIZE / \
 205                                                 CONFIG_SYS_NAND_PAGE_SIZE
 206 #define CONFIG_SYS_NAND_SIZE            (256 * 1024 * 1024)
 207 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   11
 208 #define NAND_MAX_CHIPS                  1
 209
 210 #define CONFIG_FLASH_SHOW_PROGRESS      45
 211 #define CONFIG_SYS_NAND_QUIET           1
 212
 213 /*
 214  * Partitions & Filsystems
 215  */
 216 #define CONFIG_MTD_DEVICE
 217 #define CONFIG_MTD_PARTITIONS
 218 #define CONFIG_SUPPORT_VFAT
 219
 220 /*
 221  * Ethernet (on SOC imx FEC)
 222  */
 223 #define CONFIG_FEC_MXC
 224 #define CONFIG_FEC_MXC_PHYADDR          0x1f
 225 #define CONFIG_MII                              /* MII PHY management   */
 226
 227 /*
 228  * FPGA
 229  */
 230 #ifndef CONFIG_SPL_BUILD
 231 #define CONFIG_FPGA
 232 #endif
 233 #define CONFIG_FPGA_COUNT               1
 234 #define CONFIG_FPGA_XILINX
 235 #define CONFIG_FPGA_SPARTAN3
 236 #define CONFIG_SYS_FPGA_WAIT            250 /* 250 ms */
 237 #define CONFIG_SYS_FPGA_PROG_FEEDBACK
 238 #define CONFIG_SYS_FPGA_CHECK_CTRLC
 239 #define CONFIG_SYS_FPGA_CHECK_ERROR
 240
 241 /*
 242  * Fuses - IIM
 243  */
 244 #ifdef CONFIG_CMD_IMX_FUSE
 245 #define IIM_MAC_BANK            0
 246 #define IIM_MAC_ROW             5
 247 #define IIM0_SCC_KEY            11
 248 #define IIM1_SUID               1
 249 #endif
 250
 251 /*
 252  * I2C
 253  */
 254
 255 #ifdef CONFIG_CMD_I2C
 256 #define CONFIG_SYS_I2C
 257 #define CONFIG_SYS_I2C_MXC
 258 #define CONFIG_SYS_I2C_MXC_I2C1         /* enable I2C bus 1 */
 259 #define CONFIG_SYS_I2C_MXC_I2C2         /* enable I2C bus 2 */
 260 #define CONFIG_SYS_MXC_I2C1_SPEED       100000  /* 100 kHz */
 261 #define CONFIG_SYS_MXC_I2C1_SLAVE       0x7F
 262 #define CONFIG_SYS_MXC_I2C2_SPEED       100000  /* 100 kHz */
 263 #define CONFIG_SYS_MXC_I2C2_SLAVE       0x7F
 264 #define CONFIG_SYS_I2C_NOPROBES         { }
 265
 266 #ifdef CONFIG_CMD_EEPROM
 267 # define CONFIG_SYS_I2C_EEPROM_ADDR     0x50    /* EEPROM 24LC02 */
 268 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1       /* bytes of address */
 269 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       3
 270 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   10      /* msec */
 271 #endif /* CONFIG_CMD_EEPROM */
 272 #endif /* CONFIG_CMD_I2C */
 273
 274 /*
 275  * SD/MMC
 276  */
 277 #ifdef CONFIG_CMD_MMC
 278 #define CONFIG_MXC_MCI_REGS_BASE        0x10014000
 279 #endif
 280
 281 /*
 282  * RTC
 283  */
 284 #ifdef CONFIG_CMD_DATE
 285 #define CONFIG_RTC_DS1374
 286 #define CONFIG_SYS_RTC_BUS_NUM          0
 287 #endif /* CONFIG_CMD_DATE */
 288
 289 /*
 290  * PLL
 291  *
 292  *  31 | x  |x| x x x x |x x x x x x x x x x |x x|x x x x|x x x x x x x x x x| 0
 293  *     |CPLM|X|----PD---|--------MFD---------|XXX|--MFI--|-----MFN-----------|
 294  */
 295 #define CONFIG_MX27_CLK32               32768   /* 32768 or 32000 Hz crystal */
 296
 297 #if (ACFG_SDRAM_MBYTE_SYZE == 64) /* micron MT46H16M32LF -6 */
 298 /* micron 64MB */
 299 #define PHYS_SDRAM_1_SIZE                       0x04000000 /* 64 MB */
 300 #define PHYS_SDRAM_2_SIZE                       0x04000000 /* 64 MB */
 301 #endif
 302
 303 #if (ACFG_SDRAM_MBYTE_SYZE == 128)
 304 /* micron 128MB */
 305 #define PHYS_SDRAM_1_SIZE                       0x08000000 /* 128 MB */
 306 #define PHYS_SDRAM_2_SIZE                       0x08000000 /* 128 MB */
 307 #endif
 308
 309 #if (ACFG_SDRAM_MBYTE_SYZE == 256)
 310 /* micron 256MB */
 311 #define PHYS_SDRAM_1_SIZE                       0x10000000 /* 256 MB */
 312 #define PHYS_SDRAM_2_SIZE                       0x10000000 /* 256 MB */
 313 #endif
 314
 315 #endif /* __CONFIG_H */