include/configs/apalis-imx8.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2019-2021 Toradex
   4  */
   5
   6 #ifndef __APALIS_IMX8_H
   7 #define __APALIS_IMX8_H
   8
   9 #include <asm/arch/imx-regs.h>
  10 #include <linux/sizes.h>
  11
  12 #define CFG_SYS_FSL_ESDHC_ADDR  0
  13 #define USDHC1_BASE_ADDR                0x5b010000
  14 #define USDHC2_BASE_ADDR                0x5b020000
  15
  16 /* Networking */
  17
  18 #define MEM_LAYOUT_ENV_SETTINGS \
  19         "fdt_addr_r=0x84000000\0" \
  20         "kernel_addr_r=0x82000000\0" \
  21         "ramdisk_addr_r=0x94400000\0" \
  22         "scriptaddr=0x87000000\0"
  23
  24 #define BOOT_TARGET_DEVICES(func) \
  25         func(MMC, mmc, 1) \
  26         func(MMC, mmc, 2) \
  27         func(MMC, mmc, 0) \
  28         func(DHCP, dhcp, na)
  29 #include <config_distro_bootcmd.h>
  30 #undef BOOTENV_RUN_NET_USB_START
  31 #define BOOTENV_RUN_NET_USB_START ""
  32
  33 /* Initial environment variables */
  34 #define CFG_EXTRA_ENV_SETTINGS \
  35         BOOTENV \
  36         MEM_LAYOUT_ENV_SETTINGS \
  37         "boot_file=Image\0" \
  38         "boot_script_dhcp=boot.scr\0" \
  39         "console=ttyLP1 earlycon\0" \
  40         "fdt_addr=0x83000000\0" \
  41         "fdt_file=fsl-imx8qm-apalis-eval.dtb\0" \
  42         "fdtfile=fsl-imx8qm-apalis-eval.dtb\0" \
  43         "finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \
  44         "initrd_addr=0x83800000\0" \
  45         "initrd_high=0xffffffffffffffff\0" \
  46         "mmcargs=setenv bootargs console=${console},${baudrate} " \
  47                 "root=PARTUUID=${uuid} rootwait " \
  48         "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
  49         "mmcpart=1\0" \
  50         "panel=NULL\0" \
  51         "script=boot.scr\0" \
  52         "update_uboot=askenv confirm Did you load u-boot-dtb.imx (y/N)?; " \
  53                 "if test \"$confirm\" = \"y\"; then " \
  54                 "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \
  55                 "${blkcnt} / 0x200; mmc dev 0 1; mmc write ${loadaddr} 0x0 " \
  56                 "${blkcnt}; fi\0"
  57
  58 /* Link Definitions */
  59
  60 /* On Apalis iMX8 USDHC1 is eMMC, USDHC2 is 8-bit and USDHC3 is 4-bit MMC/SD */
  61 #define CFG_SYS_FSL_USDHC_NUM   3
  62
  63 #define CFG_SYS_SDRAM_BASE              0x80000000
  64 #define PHYS_SDRAM_1                    0x80000000
  65 #define PHYS_SDRAM_2                    0x880000000
  66 #define PHYS_SDRAM_1_SIZE               SZ_2G           /* 2 GB */
  67 #define PHYS_SDRAM_2_SIZE               SZ_2G           /* 2 GB */
  68
  69 #endif /* __APALIS_IMX8_H */