2 * am3517_evm.h - Default configuration for AM3517 EVM board.
4 * Author: Vaibhav Hiremath <hvaibhav@ti.com>
6 * Based on omap3_evm_config.h
8 * Copyright (C) 2010 Texas Instruments Incorporated
10 * SPDX-License-Identifier: GPL-2.0+
16 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
18 #define CONFIG_EMIF4 /* The chip has EMIF4 controller */
21 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
22 * 64 bytes before this address should be set aside for u-boot.img's
23 * header. That is 0x800FFFC0--0x80100000 should not be used for any
26 #define CONFIG_SYS_TEXT_BASE 0x80100000
27 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
28 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
30 #include <asm/arch/cpu.h> /* get chip and board defs */
31 #include <asm/arch/omap.h>
33 #define CONFIG_MISC_INIT_R
34 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
35 #define CONFIG_SETUP_MEMORY_TAGS
36 #define CONFIG_INITRD_TAG
37 #define CONFIG_REVISION_TAG
40 #define V_OSCK 26000000 /* Clock output from T2 */
41 #define V_SCLK (V_OSCK >> 1)
43 /* Size of malloc() pool */
44 #define CONFIG_SYS_MALLOC_LEN (16 << 20)
46 /* Hardware drivers */
48 /* OMAP GPIO configuration */
49 #define CONFIG_OMAP_GPIO
51 /* NS16550 Configuration */
52 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
53 #define CONFIG_SYS_NS16550_SERIAL
54 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
55 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
57 /* select serial console configuration */
58 #define CONFIG_CONS_INDEX 3
59 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
60 #define CONFIG_SERIAL3 3 /* UART3 on AM3517 EVM */
62 /* allow to overwrite serial and ethaddr */
63 #define CONFIG_ENV_OVERWRITE
64 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
69 * Enable CONFIG_USB_MUSB_HOST for Host functionalities MSC, keyboard
70 * Enable CONFIG_USB_MUSB_GADGET for Device functionalities.
72 #define CONFIG_USB_MUSB_AM35X
73 #define CONFIG_USB_MUSB_PIO_ONLY
75 #ifdef CONFIG_USB_MUSB_AM35X
77 #ifdef CONFIG_USB_MUSB_HOST
79 #ifdef CONFIG_USB_KEYBOARD
80 #define CONFIG_SYS_USB_EVENT_POLL
81 #define CONFIG_PREBOOT "usb start"
82 #endif /* CONFIG_USB_KEYBOARD */
84 #endif /* CONFIG_USB_MUSB_HOST */
86 #ifdef CONFIG_USB_MUSB_GADGET
87 #define CONFIG_USB_ETHER
88 #define CONFIG_USB_ETH_RNDIS
89 #endif /* CONFIG_USB_MUSB_GADGET */
91 #endif /* CONFIG_USB_MUSB_AM35X */
93 /* commands to include */
94 #define CONFIG_CMD_NAND
95 #define CONFIG_CMD_MTDPARTS
98 #define CONFIG_SYS_I2C
99 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000
100 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1
101 #define CONFIG_SYS_I2C_OMAP34XX
104 #define CONFIG_DRIVER_TI_EMAC
105 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
107 #define CONFIG_BOOTP_DEFAULT
108 #define CONFIG_BOOTP_DNS
109 #define CONFIG_BOOTP_DNS2
110 #define CONFIG_BOOTP_SEND_HOSTNAME
111 #define CONFIG_NET_RETRY_COUNT 10
113 /* Board NAND Info. */
115 #define CONFIG_NAND_OMAP_GPMC
116 #define CONFIG_NAND_OMAP_GPMC_PREFETCH
118 #define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */
119 #define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */
120 #define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */
121 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
123 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
126 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
128 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
129 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
130 #define CONFIG_SYS_NAND_PAGE_COUNT 64
131 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
132 #define CONFIG_SYS_NAND_OOBSIZE 64
133 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
134 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
135 #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, 10, \
136 11, 12, 13, 14, 16, 17, 18, 19, 20, \
137 21, 22, 23, 24, 25, 26, 27, 28, 30, \
138 31, 32, 33, 34, 35, 36, 37, 38, 39, \
139 40, 41, 42, 44, 45, 46, 47, 48, 49, \
140 50, 51, 52, 53, 54, 55, 56 }
142 #define CONFIG_SYS_NAND_ECCSIZE 512
143 #define CONFIG_SYS_NAND_ECCBYTES 13
144 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
145 #define CONFIG_SYS_NAND_MAX_OOBFREE 2
146 #define CONFIG_SYS_NAND_MAX_ECCPOS 56
147 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
148 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
149 #define CONFIG_MTD_PARTITIONS /* required for UBI partition support */
150 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
151 /* NAND block size is 128 KiB. Synchronize these values with
152 * corresponding Device Tree entries in Linux:
153 * MLO(SPL) 4 * NAND_BLOCK_SIZE = 512 KiB @ 0x000000
154 * U-Boot 15 * NAND_BLOCK_SIZE = 1920 KiB @ 0x080000
155 * U-Boot environment 2 * NAND_BLOCK_SIZE = 256 KiB @ 0x260000
156 * Kernel 64 * NAND_BLOCK_SIZE = 8 MiB @ 0x2A0000
157 * DTB 4 * NAND_BLOCK_SIZE = 512 KiB @ 0xAA0000
158 * RootFS Remaining Flash Space @ 0xB20000
160 #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
161 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \
164 "256k(u-boot-env)," \
169 #define MTDIDS_DEFAULT
170 #define MTDPARTS_DEFAULT
171 #endif /* CONFIG_NAND */
173 /* Environment information */
175 #define CONFIG_BOOTFILE "uImage"
177 #define CONFIG_EXTRA_ENV_SETTINGS \
178 "loadaddr=0x82000000\0" \
179 "console=ttyO2,115200n8\0" \
180 "fdtfile=am3517-evm.dtb\0" \
181 "fdtaddr=0x82C00000\0" \
183 "bootenv=uEnv.txt\0" \
186 "mtdids=" MTDIDS_DEFAULT "\0" \
187 "mtdparts=" MTDPARTS_DEFAULT "\0" \
190 "mmcroot=/dev/mmcblk0p2 rw\0" \
191 "mmcrootfstype=ext4 rootwait fixrtc\0" \
192 "mmcargs=setenv bootargs console=${console} " \
196 "rootfstype=${mmcrootfstype} " \
198 "nandargs=setenv bootargs console=${console} " \
201 "root=ubi0:rootfs rw ubi.mtd=rootfs " \
202 "rootfstype=ubifs rootwait " \
204 "loadbootenv=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootenv}\0"\
205 "importbootenv=echo Importing environment from mmc ...; " \
206 "env import -t ${loadaddr} ${filesize}\0" \
207 "bootscript=echo Running bootscript from mmc ...; " \
208 "source ${loadaddr}\0" \
209 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootfile}\0" \
210 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdtaddr} ${fdtfile}\0" \
211 "mmcboot=echo Booting from mmc ...; " \
213 "bootz ${loadaddr} - ${fdtaddr}\0" \
214 "nandboot=echo Booting from nand ...; " \
216 "nand read ${loadaddr} 2a0000 800000; " \
217 "nand read ${fdtaddr} aa0000 80000; " \
218 "bootm ${loadaddr} - ${fdtaddr}\0" \
220 #define CONFIG_BOOTCOMMAND \
221 "mmc dev ${mmcdev}; if mmc rescan; then " \
222 "echo SD/MMC found on device $mmcdev; " \
223 "if run loadbootenv; then " \
224 "run importbootenv; " \
226 "echo Checking if uenvcmd is set ...; " \
227 "if test -n $uenvcmd; then " \
228 "echo Running uenvcmd ...; " \
231 "echo Running default loadimage ...; " \
232 "setenv bootfile zImage; " \
233 "if run loadimage; then " \
237 "else run nandboot; fi"
239 /* Miscellaneous configurable options */
240 #define CONFIG_AUTO_COMPLETE
241 #define CONFIG_CMDLINE_EDITING
242 #define CONFIG_SYS_LONGHELP
244 /* We set the max number of command args high to avoid HUSH bugs. */
245 #define CONFIG_SYS_MAXARGS 64
247 /* Console I/O Buffer Size */
248 #define CONFIG_SYS_CBSIZE 512
249 /* Print Buffer Size */
250 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
251 + sizeof(CONFIG_SYS_PROMPT) + 16)
252 /* Boot Argument Buffer Size */
253 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
255 /* memtest works on */
256 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
257 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
258 0x01F00000) /* 31MB */
260 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
264 * AM3517 has 12 GP timers, they can be driven by the system clock
265 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
266 * This rate is divided by a local divisor.
268 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
269 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
271 /* Physical Memory Map */
272 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
273 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
274 #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
275 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
276 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
277 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
278 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
279 CONFIG_SYS_INIT_RAM_SIZE - \
280 GENERATED_GBL_DATA_SIZE)
282 /* FLASH and environment organization */
284 /* **** PISMO SUPPORT *** */
285 #define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors */
287 #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */
288 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
290 #if defined(CONFIG_NAND)
291 #define CONFIG_SYS_FLASH_BASE NAND_BASE
294 /* Monitor at start of flash */
295 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
297 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
298 #define CONFIG_ENV_SIZE CONFIG_SYS_ENV_SECT_SIZE
299 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
300 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
301 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
302 #define CONFIG_ENV_IS_IN_NAND
304 /* Defines for SPL */
305 #define CONFIG_SPL_FRAMEWORK
306 #define CONFIG_SPL_BOARD_INIT
307 #define CONFIG_SPL_NAND_SIMPLE
308 #define CONFIG_SPL_TEXT_BASE 0x40200000
309 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
310 CONFIG_SPL_TEXT_BASE)
312 #define CONFIG_SPL_BSS_START_ADDR 0x80000000
313 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
315 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
316 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
318 #define CONFIG_SPL_NAND_BASE
319 #define CONFIG_SPL_NAND_DRIVERS
320 #define CONFIG_SPL_NAND_ECC
321 #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
323 #endif /* __CONFIG_H */