include/configs/am3517_evm.h

   1 /*
   2  * am3517_evm.h - Default configuration for AM3517 EVM board.
   3  *
   4  * Author: Vaibhav Hiremath <hvaibhav@ti.com>
   5  *
   6  * Based on omap3_evm_config.h
   7  *
   8  * Copyright (C) 2010 Texas Instruments Incorporated
   9  *
  10  * SPDX-License-Identifier:     GPL-2.0+
  11  */
  12
  13 #ifndef __CONFIG_H
  14 #define __CONFIG_H
  15
  16 #define CONFIG_SYS_CACHELINE_SIZE       64
  17
  18 /*
  19  * High Level Configuration Options
  20  */
  21 #define CONFIG_OMAP             1       /* in a TI OMAP core */
  22 #define CONFIG_OMAP3_AM3517EVM  1       /* working with AM3517EVM */
  23 #define CONFIG_OMAP_COMMON
  24 /* Common ARM Erratas */
  25 #define CONFIG_ARM_ERRATA_454179
  26 #define CONFIG_ARM_ERRATA_430973
  27 #define CONFIG_ARM_ERRATA_621766
  28
  29 #define CONFIG_EMIF4    /* The chip has EMIF4 controller */
  30
  31 #include <asm/arch/cpu.h>               /* get chip and board defs */
  32 #include <asm/arch/omap.h>
  33
  34 /*
  35  * Display CPU and Board information
  36  */
  37 #define CONFIG_DISPLAY_CPUINFO          1
  38 #define CONFIG_DISPLAY_BOARDINFO        1
  39
  40 /* Clock Defines */
  41 #define V_OSCK                  26000000        /* Clock output from T2 */
  42 #define V_SCLK                  (V_OSCK >> 1)
  43
  44 #define CONFIG_MISC_INIT_R
  45
  46 #define CONFIG_OF_LIBFDT
  47
  48 #define CONFIG_CMDLINE_TAG              1       /* enable passing of ATAGs */
  49 #define CONFIG_SETUP_MEMORY_TAGS        1
  50 #define CONFIG_INITRD_TAG               1
  51 #define CONFIG_REVISION_TAG             1
  52
  53 /*
  54  * Size of malloc() pool
  55  */
  56 #define CONFIG_ENV_SIZE                 (128 << 10)     /* 128 KiB sector */
  57 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10))
  58 /*
  59  * DDR related
  60  */
  61 #define CONFIG_SYS_CS0_SIZE             (256 * 1024 * 1024)
  62
  63 /*
  64  * Hardware drivers
  65  */
  66
  67 /*
  68  * OMAP GPIO configuration
  69  */
  70 #define CONFIG_OMAP_GPIO
  71
  72 /*
  73  * NS16550 Configuration
  74  */
  75 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
  76
  77 #define CONFIG_SYS_NS16550_SERIAL
  78 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  79 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
  80
  81 /*
  82  * select serial console configuration
  83  */
  84 #define CONFIG_CONS_INDEX               3
  85 #define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
  86 #define CONFIG_SERIAL3                  3       /* UART3 on AM3517 EVM */
  87
  88 /* allow to overwrite serial and ethaddr */
  89 #define CONFIG_ENV_OVERWRITE
  90 #define CONFIG_BAUDRATE                 115200
  91 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
  92                                         115200}
  93 #define CONFIG_MMC                      1
  94 #define CONFIG_GENERIC_MMC              1
  95 #define CONFIG_OMAP_HSMMC               1
  96 #define CONFIG_DOS_PARTITION            1
  97
  98 /*
  99  * USB configuration
 100  * Enable CONFIG_USB_MUSB_HOST for Host functionalities MSC, keyboard
 101  * Enable CONFIG_USB_MUSB_GADGET for Device functionalities.
 102  */
 103 #define CONFIG_USB_MUSB_AM35X
 104 #define CONFIG_USB_MUSB_HOST
 105 #define CONFIG_USB_MUSB_PIO_ONLY
 106
 107 #ifdef CONFIG_USB_MUSB_AM35X
 108
 109 #ifdef CONFIG_USB_MUSB_HOST
 110 #define CONFIG_CMD_USB
 111
 112 #define CONFIG_USB_STORAGE
 113 #define CONGIG_CMD_STORAGE
 114 #define CONFIG_CMD_FAT
 115
 116 #ifdef CONFIG_USB_KEYBOARD
 117 #define CONFIG_SYS_USB_EVENT_POLL
 118 #define CONFIG_PREBOOT "usb start"
 119 #endif /* CONFIG_USB_KEYBOARD */
 120
 121 #endif /* CONFIG_USB_MUSB_HOST */
 122
 123 #ifdef CONFIG_USB_MUSB_GADGET
 124 #define CONFIG_USB_GADGET_DUALSPEED
 125 #define CONFIG_USB_ETHER
 126 #define CONFIG_USB_ETH_RNDIS
 127 #endif /* CONFIG_USB_MUSB_GADGET */
 128
 129 #endif /* CONFIG_USB_MUSB_AM35X */
 130
 131 /* commands to include */
 132 #define CONFIG_CMD_EXT2         /* EXT2 Support                 */
 133 #define CONFIG_CMD_FAT          /* FAT support                  */
 134 #define CONFIG_CMD_JFFS2        /* JFFS2 Support                */
 135 #define CONFIG_CMD_EXT4
 136 #define CONFIG_CMD_EXT4_WRITE
 137
 138 #define CONFIG_CMD_BOOTZ
 139
 140 #define CONFIG_CMD_I2C          /* I2C serial bus support       */
 141 #define CONFIG_CMD_MMC          /* MMC support                  */
 142 #define CONFIG_CMD_NAND         /* NAND support                 */
 143 #define CONFIG_CMD_DHCP
 144 #undef CONFIG_CMD_PING
 145
 146
 147 #define CONFIG_SYS_NO_FLASH
 148 #define CONFIG_SYS_I2C
 149 #define CONFIG_SYS_OMAP24_I2C_SPEED     100000
 150 #define CONFIG_SYS_OMAP24_I2C_SLAVE     1
 151 #define CONFIG_SYS_I2C_OMAP34XX
 152
 153 /*
 154  * Ethernet
 155  */
 156 #define CONFIG_DRIVER_TI_EMAC
 157 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
 158 #define CONFIG_MII
 159 #define CONFIG_BOOTP_DEFAULT
 160 #define CONFIG_BOOTP_DNS
 161 #define CONFIG_BOOTP_DNS2
 162 #define CONFIG_BOOTP_SEND_HOSTNAME
 163 #define CONFIG_NET_RETRY_COUNT          10
 164
 165 /*
 166  * Board NAND Info.
 167  */
 168 #define CONFIG_SYS_NAND_ADDR            NAND_BASE       /* physical address */
 169                                                         /* to access nand */
 170 #define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
 171                                                         /* to access */
 172                                                         /* nand at CS0 */
 173
 174 #define CONFIG_SYS_MAX_NAND_DEVICE      1               /* Max number of */
 175                                                         /* NAND devices */
 176 #define CONFIG_JFFS2_NAND
 177 /* nand device jffs2 lives on */
 178 #define CONFIG_JFFS2_DEV                "nand0"
 179 /* start of jffs2 partition */
 180 #define CONFIG_JFFS2_PART_OFFSET        0x680000
 181 #define CONFIG_JFFS2_PART_SIZE          0xf980000       /* sz of jffs2 part */
 182
 183 /* Environment information */
 184 #define CONFIG_BOOTDELAY        10
 185
 186 #define CONFIG_BOOTFILE         "uImage"
 187
 188 #define CONFIG_EXTRA_ENV_SETTINGS \
 189         "loadaddr=0x82000000\0" \
 190         "console=ttyO2,115200n8\0" \
 191         "fdtfile=am3517-evm.dtb\0" \
 192         "fdtaddr=0x82C00000\0" \
 193         "vram=16M\0" \
 194         "bootenv=uEnv.txt\0" \
 195         "cmdline=\0" \
 196         "optargs=\0" \
 197         "mmcdev=0\0" \
 198         "mmcpart=1\0" \
 199         "mmcroot=/dev/mmcblk0p2 rw\0" \
 200         "mmcrootfstype=ext4 rootwait fixrtc\0" \
 201         "mmcargs=setenv bootargs console=${console} " \
 202                 "${optargs} " \
 203                 "root=${mmcroot} " \
 204                 "rootfstype=${mmcrootfstype} " \
 205                 "${cmdline}\0" \
 206         "nandargs=setenv bootargs console=${console} " \
 207                 "root=/dev/mtdblock4 rw " \
 208                 "rootfstype=jffs2\0" \
 209         "loadbootenv=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootenv}\0"\
 210         "importbootenv=echo Importing environment from mmc ...; " \
 211                 "env import -t ${loadaddr} ${filesize}\0" \
 212         "bootscript=echo Running bootscript from mmc ...; " \
 213                 "source ${loadaddr}\0" \
 214         "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootfile}\0" \
 215         "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdtaddr} ${fdtfile}\0" \
 216         "mmcboot=echo Booting from mmc ...; " \
 217                 "run mmcargs; " \
 218                 "bootz ${loadaddr} - ${fdtaddr}\0" \
 219         "nandboot=echo Booting from nand ...; " \
 220                 "run nandargs; " \
 221                 "nand read ${loadaddr} 280000 400000; " \
 222                 "bootm ${loadaddr}\0" \
 223
 224 #define CONFIG_BOOTCOMMAND \
 225         "mmc dev ${mmcdev}; if mmc rescan; then " \
 226                 "echo SD/MMC found on device $mmcdev; " \
 227                 "if run loadbootenv; then " \
 228                         "run importbootenv; " \
 229                 "fi; " \
 230                 "echo Checking if uenvcmd is set ...; " \
 231                 "if test -n $uenvcmd; then " \
 232                         "echo Running uenvcmd ...; " \
 233                         "run uenvcmd; " \
 234                 "fi; " \
 235                 "echo Running default loadimage ...; " \
 236                 "setenv bootfile zImage; " \
 237                 "if run loadimage; then " \
 238                         "run loadfdt; " \
 239                         "run mmcboot; " \
 240                 "fi; " \
 241         "else run nandboot; fi"
 242
 243 #define CONFIG_AUTO_COMPLETE    1
 244 /*
 245  * Miscellaneous configurable options
 246  */
 247 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 248 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
 249 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
 250 /* Print Buffer Size */
 251 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 252                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 253 #define CONFIG_SYS_MAXARGS              32      /* max number of command */
 254                                                 /* args */
 255 /* Boot Argument Buffer Size */
 256 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
 257 /* memtest works on */
 258 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)
 259 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
 260                                         0x01F00000) /* 31MB */
 261
 262 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0) /* default load */
 263                                                                 /* address */
 264
 265 /*
 266  * AM3517 has 12 GP timers, they can be driven by the system clock
 267  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 268  * This rate is divided by a local divisor.
 269  */
 270 #define CONFIG_SYS_TIMERBASE            OMAP34XX_GPT2
 271 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
 272
 273 /*-----------------------------------------------------------------------
 274  * Physical Memory Map
 275  */
 276 #define CONFIG_NR_DRAM_BANKS    2       /* CS1 may or may not be populated */
 277 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
 278 #define PHYS_SDRAM_2            OMAP34XX_SDRC_CS1
 279
 280 /*-----------------------------------------------------------------------
 281  * FLASH and environment organization
 282  */
 283
 284 /* **** PISMO SUPPORT *** */
 285 #define CONFIG_SYS_MAX_FLASH_SECT       520     /* max number of sectors */
 286                                                 /* on one chip */
 287 #define CONFIG_SYS_MAX_FLASH_BANKS      2       /* max number of flash banks */
 288 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 2 sectors */
 289
 290 #if defined(CONFIG_CMD_NAND)
 291 #define CONFIG_SYS_FLASH_BASE           NAND_BASE
 292 #endif
 293
 294 /* Monitor at start of flash */
 295 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 296
 297 #define CONFIG_NAND_OMAP_GPMC
 298 #define CONFIG_ENV_IS_IN_NAND           1
 299 #define SMNAND_ENV_OFFSET               0x260000 /* environment starts here */
 300
 301 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
 302 #define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
 303 #define CONFIG_ENV_ADDR                 SMNAND_ENV_OFFSET
 304
 305 /*-----------------------------------------------------------------------
 306  * CFI FLASH driver setup
 307  */
 308 /* timeout values are in ticks */
 309 #define CONFIG_SYS_FLASH_ERASE_TOUT     (100 * CONFIG_SYS_HZ)
 310 #define CONFIG_SYS_FLASH_WRITE_TOUT     (100 * CONFIG_SYS_HZ)
 311
 312 /* Flash banks JFFS2 should use */
 313 #define CONFIG_SYS_MAX_MTD_BANKS        (CONFIG_SYS_MAX_FLASH_BANKS + \
 314                                         CONFIG_SYS_MAX_NAND_DEVICE)
 315 #define CONFIG_SYS_JFFS2_MEM_NAND
 316 /* use flash_info[2] */
 317 #define CONFIG_SYS_JFFS2_FIRST_BANK     CONFIG_SYS_MAX_FLASH_BANKS
 318 #define CONFIG_SYS_JFFS2_NUM_BANKS      1
 319
 320 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 321 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 322 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
 323 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 324                                          CONFIG_SYS_INIT_RAM_SIZE - \
 325                                          GENERATED_GBL_DATA_SIZE)
 326
 327 /* Defines for SPL */
 328 #define CONFIG_SPL_FRAMEWORK
 329 #define CONFIG_SPL_BOARD_INIT
 330 #define CONFIG_SPL_NAND_SIMPLE
 331 #define CONFIG_SPL_TEXT_BASE            0x40200000
 332 #define CONFIG_SPL_MAX_SIZE             (64 * 1024)
 333
 334 #define CONFIG_SPL_BSS_START_ADDR       0x80000000
 335 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000         /* 512 KB */
 336
 337 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
 338 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS      0x200 /* 256 KB */
 339 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION      1
 340 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
 341
 342 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 343 #define CONFIG_SPL_LIBDISK_SUPPORT
 344 #define CONFIG_SPL_I2C_SUPPORT
 345 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 346 #define CONFIG_SPL_MMC_SUPPORT
 347 #define CONFIG_SPL_FAT_SUPPORT
 348 #define CONFIG_SPL_SERIAL_SUPPORT
 349 #define CONFIG_SPL_NAND_SUPPORT
 350 #define CONFIG_SPL_NAND_BASE
 351 #define CONFIG_SPL_NAND_DRIVERS
 352 #define CONFIG_SPL_NAND_ECC
 353 #define CONFIG_SPL_POWER_SUPPORT
 354 #define CONFIG_SPL_LDSCRIPT             "$(CPUDIR)/omap-common/u-boot-spl.lds"
 355
 356 /* NAND boot config */
 357 #define CONFIG_BCH
 358 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 359 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 360 #define CONFIG_SYS_NAND_PAGE_COUNT      64
 361 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
 362 #define CONFIG_SYS_NAND_OOBSIZE         64
 363 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128 * 1024)
 364 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
 365 #define CONFIG_SYS_NAND_ECCPOS          { 2,  3,  4,  5,  6,  7,  8,  9, 10, \
 366                                          11, 12, 13, 14, 16, 17, 18, 19, 20, \
 367                                          21, 22, 23, 24, 25, 26, 27, 28, 30, \
 368                                          31, 32, 33, 34, 35, 36, 37, 38, 39, \
 369                                          40, 41, 42, 44, 45, 46, 47, 48, 49, \
 370                                          50, 51, 52, 53, 54, 55, 56 }
 371
 372 #define CONFIG_SYS_NAND_ECCSIZE         512
 373 #define CONFIG_SYS_NAND_ECCBYTES        13
 374 #define CONFIG_NAND_OMAP_ECCSCHEME      OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
 375 #define CONFIG_SYS_NAND_MAX_OOBFREE     2
 376 #define CONFIG_SYS_NAND_MAX_ECCPOS      56
 377 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
 378 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x80000
 379
 380 /*
 381  * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
 382  * 64 bytes before this address should be set aside for u-boot.img's
 383  * header. That is 0x800FFFC0--0x80100000 should not be used for any
 384  * other needs.
 385  */
 386 #define CONFIG_SYS_TEXT_BASE            0x80100000
 387 #define CONFIG_SYS_SPL_MALLOC_START     0x80208000
 388 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
 389
 390 #endif /* __CONFIG_H */