2 * Copyright (C) 2016 Timesys Corporation
3 * Copyright (C) 2016 Advantech Corporation
4 * Copyright (C) 2012 Freescale Semiconductor, Inc.
6 * SPDX-License-Identifier: GPL-2.0+
9 #ifndef __ADVANTECH_DMSBA16_CONFIG_H
10 #define __ADVANTECH_DMSBA16_CONFIG_H
12 #include <asm/arch/imx-regs.h>
13 #include <asm/mach-imx/gpio.h>
15 #define CONFIG_BOARD_NAME "Advantech DMS-BA16"
17 #define CONFIG_MXC_UART_BASE UART4_BASE
18 #define CONSOLE_DEV "ttymxc3"
19 #define CONFIG_EXTRA_BOOTARGS "panic=10"
21 #define CONFIG_BOOT_DIR ""
22 #define CONFIG_LOADCMD "fatload"
23 #define CONFIG_RFSPART "2"
25 #define CONFIG_SUPPORT_EMMC_BOOT
27 #include "mx6_common.h"
28 #include <linux/sizes.h>
30 #define CONFIG_CMDLINE_TAG
31 #define CONFIG_SETUP_MEMORY_TAGS
32 #define CONFIG_INITRD_TAG
33 #define CONFIG_REVISION_TAG
34 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
36 #define CONFIG_MXC_UART
38 #define CONFIG_MXC_OCOTP
41 #define CONFIG_SYS_SATA_MAX_DEVICE 1
42 #define CONFIG_DWC_AHSATA_PORT_ID 0
43 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
47 #define CONFIG_FSL_ESDHC
48 #define CONFIG_FSL_USDHC
49 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
50 #define CONFIG_BOUNCE_BUFFER
53 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
54 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
55 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
56 #define CONFIG_MXC_USB_FLAGS 0
58 #define CONFIG_USBD_HS
60 /* Networking Configs */
61 #define CONFIG_FEC_MXC
63 #define IMX_FEC_BASE ENET_BASE_ADDR
64 #define CONFIG_FEC_XCV_TYPE RGMII
65 #define CONFIG_ETHPRIME "FEC"
66 #define CONFIG_FEC_MXC_PHYADDR 4
67 #define CONFIG_PHY_ATHEROS
71 #define CONFIG_SF_DEFAULT_BUS 0
72 #define CONFIG_SF_DEFAULT_CS 0
73 #define CONFIG_SF_DEFAULT_SPEED 20000000
74 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
77 /* allow to overwrite serial and ethaddr */
78 #define CONFIG_ENV_OVERWRITE
80 #define CONFIG_LOADADDR 0x12000000
82 #define CONFIG_EXTRA_ENV_SETTINGS \
84 "image=" CONFIG_BOOT_DIR "/uImage\0" \
85 "uboot=u-boot.imx\0" \
86 "fdt_file=" CONFIG_BOOT_DIR "/" CONFIG_DEFAULT_FDT_FILE "\0" \
87 "fdt_addr=0x18000000\0" \
90 "console=" CONSOLE_DEV "\0" \
91 "fdt_high=0xffffffff\0" \
92 "initrd_high=0xffffffff\0" \
96 "loadcmd=" CONFIG_LOADCMD "\0" \
97 "rfspart=" CONFIG_RFSPART "\0" \
98 "update_sd_firmware=" \
99 "if test ${ip_dyn} = yes; then " \
100 "setenv get_cmd dhcp; " \
102 "setenv get_cmd tftp; " \
104 "if mmc dev ${mmcdev}; then " \
105 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
106 "setexpr fw_sz ${filesize} / 0x200; " \
107 "setexpr fw_sz ${fw_sz} + 1; " \
108 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
112 "if tftp $loadaddr $uboot; then " \
114 "sf erase 0 0xC0000; " \
115 "sf write $loadaddr 0x400 $filesize; " \
116 "echo 'U-Boot upgraded. Please reset'; " \
118 "setargs=setenv bootargs console=${console},${baudrate} " \
119 "root=/dev/${rootdev} rw rootwait " CONFIG_EXTRA_BOOTARGS "\0" \
121 "${loadcmd} ${dev} ${devnum}:${partnum} ${loadaddr} ${script};\0" \
122 "bootscript=echo Running bootscript from ${dev}:${devnum}:${partnum};" \
125 "${loadcmd} ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \
126 "loadfdt=${loadcmd} ${dev} ${devnum}:${partnum} ${fdt_addr} ${fdt_file}\0" \
128 "if run loadbootscript; then " \
131 "if run loadimage; then " \
135 "doboot=echo Booting from ${dev}:${devnum}:${partnum} ...; " \
137 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
138 "if run loadfdt; then " \
139 "bootm ${loadaddr} - ${fdt_addr}; " \
141 "if test ${boot_fdt} = try; then " \
144 "echo WARN: Cannot load the DT; " \
150 "netargs=setenv bootargs console=${console},${baudrate} " \
152 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
153 "netboot=echo Booting from net ...; " \
155 "if test ${ip_dyn} = yes; then " \
156 "setenv get_cmd dhcp; " \
158 "setenv get_cmd tftp; " \
160 "${get_cmd} ${image}; " \
161 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
162 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
163 "bootm ${loadaddr} - ${fdt_addr}; " \
165 "if test ${boot_fdt} = try; then " \
168 "echo WARN: Cannot load the DT; " \
175 #define CONFIG_BOOTCOMMAND \
178 "setenv devnum 0; " \
179 "setenv rootdev sda${rfspart}; " \
183 "setenv rootdev mmcblk0p${rfspart}; " \
185 "setenv devnum ${sddev}; " \
186 "if mmc dev ${devnum}; then " \
190 "setenv devnum ${emmcdev}; " \
191 "setenv rootdev mmcblk${emmcdev}p${rfspart}; " \
192 "if mmc dev ${devnum}; then " \
198 #define CONFIG_ARP_TIMEOUT 200UL
200 /* Miscellaneous configurable options */
202 #define CONFIG_SYS_MEMTEST_START 0x10000000
203 #define CONFIG_SYS_MEMTEST_END 0x10010000
204 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
206 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
208 /* Physical Memory Map */
209 #define CONFIG_NR_DRAM_BANKS 1
210 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
212 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
213 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
214 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
216 #define CONFIG_SYS_INIT_SP_OFFSET \
217 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
218 #define CONFIG_SYS_INIT_SP_ADDR \
219 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
221 /* FLASH and environment organization */
223 #define CONFIG_ENV_SIZE (8 * 1024)
224 #define CONFIG_ENV_OFFSET (768 * 1024)
225 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
226 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
227 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
228 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
229 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
231 #ifndef CONFIG_SYS_DCACHE_OFF
234 #define CONFIG_SYS_FSL_USDHC_NUM 3
238 #define CONFIG_VIDEO_IPUV3
239 #define CONFIG_VIDEO_BMP_RLE8
240 #define CONFIG_SPLASH_SCREEN
241 #define CONFIG_SPLASH_SCREEN_ALIGN
242 #define CONFIG_BMP_16BPP
243 #define CONFIG_VIDEO_LOGO
244 #define CONFIG_VIDEO_BMP_LOGO
245 #define CONFIG_IMX_HDMI
246 #define CONFIG_IMX_VIDEO_SKIP
249 #define CONFIG_PWM_IMX
250 #define CONFIG_IMX6_PWM_PER_CLK 66000000
252 #ifdef CONFIG_CMD_PCI
253 #define CONFIG_PCI_SCAN_SHOW
254 #define CONFIG_PCIE_IMX
255 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
256 #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(1, 5)
260 #define CONFIG_SYS_I2C
261 #define CONFIG_SYS_I2C_MXC
262 #define CONFIG_SYS_I2C_SPEED 100000
263 #define CONFIG_SYS_I2C_MXC_I2C1
264 #define CONFIG_SYS_I2C_MXC_I2C2
265 #define CONFIG_SYS_I2C_MXC_I2C3
267 #endif /* __ADVANTECH_DMSBA16_CONFIG_H */