include/configs/adsvix.h

   1 /*
   2  * (C) Copyright 2004
   3  * Robert Whaley, Applied Data Systems, Inc. rwhaley@applieddata.net
   4  *
   5  * (C) Copyright 2002
   6  * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
   7  *
   8  * (C) Copyright 2002
   9  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  10  * Marius Groeger <mgroeger@sysgo.de>
  11  *
  12  * Configuation settings for the LUBBOCK board.
  13  *
  14  * See file CREDITS for list of people who contributed to this
  15  * project.
  16  *
  17  * This program is free software; you can redistribute it and/or
  18  * modify it under the terms of the GNU General Public License as
  19  * published by the Free Software Foundation; either version 2 of
  20  * the License, or (at your option) any later version.
  21  *
  22  * This program is distributed in the hope that it will be useful,
  23  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  25  * GNU General Public License for more details.
  26  *
  27  * You should have received a copy of the GNU General Public License
  28  * along with this program; if not, write to the Free Software
  29  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30  * MA 02111-1307 USA
  31  */
  32
  33 #ifndef __CONFIG_H
  34 #define __CONFIG_H
  35
  36 /*
  37  * High Level Configuration Options
  38  * (easy to change)
  39  */
  40 #define CONFIG_PXA27X           1       /* This is an PXA27x CPU    */
  41 #define CONFIG_ADSVIX           1       /* on a Adsvix Board     */
  42 #define CONFIG_MMC              1
  43 #define BOARD_LATE_INIT         1
  44
  45 #undef CONFIG_USE_IRQ                   /* we don't need IRQ/FIQ stuff */
  46
  47 #define RTC
  48
  49 /*
  50  * Size of malloc() pool
  51  */
  52 #define CFG_MALLOC_LEN      (CFG_ENV_SIZE + 128*1024)
  53 #define CFG_GBL_DATA_SIZE       128     /* size in bytes reserved for initial data */
  54
  55 /*
  56  * Hardware drivers
  57  */
  58
  59 /*
  60  * select serial console configuration
  61  */
  62 #define CONFIG_FFUART          1       /* we use FFUART on ADSVIX */
  63
  64 /* allow to overwrite serial and ethaddr */
  65 #define CONFIG_ENV_OVERWRITE
  66
  67 #define CONFIG_BAUDRATE        38400
  68
  69 #define CONFIG_DOS_PARTITION   1
  70
  71
  72 /*
  73  * BOOTP options
  74  */
  75 #define CONFIG_BOOTP_BOOTFILESIZE
  76 #define CONFIG_BOOTP_BOOTPATH
  77 #define CONFIG_BOOTP_GATEWAY
  78 #define CONFIG_BOOTP_HOSTNAME
  79
  80
  81 /*
  82  * Command line configuration.
  83  */
  84 #include <config_cmd_default.h>
  85
  86 #define CONFIG_CMD_FAT
  87 #define CONFIG_CMD_IDE
  88 #define CONFIG_CMD_MMC
  89 #define CONFIG_CMD_PCMCIA
  90
  91 #undef CONFIG_CMD_NET
  92
  93
  94 #undef CONFIG_SHOW_BOOT_PROGRESS
  95
  96 #define CONFIG_BOOTDELAY        3
  97 #define CONFIG_SERVERIP         192.168.1.99
  98 #define CONFIG_BOOTCOMMAND      "run boot_flash"
  99 #define CONFIG_BOOTARGS         "console=ttyS0,38400 ramdisk_size=12288"\
 100                                 " rw root=/dev/ram initrd=0xa0800000,5m"
 101
 102 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 103         "program_boot_cf="                                              \
 104                         "mw.b 0xa0010000 0xff 0x20000; "                \
 105                         "if      pinit on && "                          \
 106                                 "ide reset && "                         \
 107                                 "fatload ide 0 0xa0010000 u-boot.bin; " \
 108                         "then "                                         \
 109                                 "protect off 0x0 0x1ffff; "             \
 110                                 "erase 0x0 0x1ffff; "                   \
 111                                 "cp.b 0xa0010000 0x0 0x20000; "         \
 112                         "fi\0"                                          \
 113         "program_uzImage_cf="                                           \
 114                         "mw.b 0xa0010000 0xff 0x180000; "               \
 115                         "if      pinit on && "                          \
 116                                 "ide reset && "                         \
 117                                 "fatload ide 0 0xa0010000 uzImage; "    \
 118                         "then "                                         \
 119                                 "protect off 0x40000 0x1bffff; "        \
 120                                 "erase 0x40000 0x1bffff; "              \
 121                                 "cp.b 0xa0010000 0x40000 0x180000; "    \
 122                         "fi\0"                                          \
 123         "program_ramdisk_cf="                                           \
 124                         "mw.b 0xa0010000 0xff 0x500000; "               \
 125                         "if      pinit on && "                          \
 126                                 "ide reset && "                         \
 127                                 "fatload ide 0 0xa0010000 ramdisk.gz; " \
 128                         "then "                                         \
 129                                 "protect off 0x1c0000 0x6bffff; "       \
 130                                 "erase 0x1c0000 0x6bffff; "             \
 131                                 "cp.b 0xa0010000 0x1c0000 0x500000; "   \
 132                         "fi\0"                                          \
 133         "boot_cf="                                                      \
 134                         "if      pinit on && "                          \
 135                                 "ide reset && "                         \
 136                                 "fatload ide 0 0xa0030000 uzImage && "  \
 137                                 "fatload ide 0 0xa0800000 ramdisk.gz; " \
 138                         "then "                                         \
 139                                 "bootm 0xa0030000; "                    \
 140                         "fi\0"                                          \
 141         "program_boot_mmc="                                             \
 142                         "mw.b 0xa0010000 0xff 0x20000; "                \
 143                         "if      mmcinit && "                           \
 144                                 "fatload mmc 0 0xa0010000 u-boot.bin; " \
 145                         "then "                                         \
 146                                 "protect off 0x0 0x1ffff; "             \
 147                                 "erase 0x0 0x1ffff; "                   \
 148                                 "cp.b 0xa0010000 0x0 0x20000; "         \
 149                         "fi\0"                                          \
 150         "program_uzImage_mmc="                                          \
 151                         "mw.b 0xa0010000 0xff 0x180000; "               \
 152                         "if      mmcinit && "                           \
 153                                 "fatload mmc 0 0xa0010000 uzImage; "    \
 154                         "then "                                         \
 155                                 "protect off 0x40000 0x1bffff; "        \
 156                                 "erase 0x40000 0x1bffff; "              \
 157                                 "cp.b 0xa0010000 0x40000 0x180000; "    \
 158                         "fi\0"                                          \
 159         "program_ramdisk_mmc="                                          \
 160                         "mw.b 0xa0010000 0xff 0x500000; "               \
 161                         "if      mmcinit && "                           \
 162                                 "fatload mmc 0 0xa0010000 ramdisk.gz; " \
 163                         "then "                                         \
 164                                 "protect off 0x1c0000 0x6bffff; "       \
 165                                 "erase 0x1c0000 0x6bffff; "             \
 166                                 "cp.b 0xa0010000 0x1c0000 0x500000; "   \
 167                         "fi\0"                                          \
 168         "boot_mmc="                                                     \
 169                         "if      mmcinit && "                           \
 170                                 "fatload mmc 0 0xa0030000 uzImage && "  \
 171                                 "fatload mmc 0 0xa0800000 ramdisk.gz; " \
 172                         "then "                                         \
 173                                 "bootm 0xa0030000; "                    \
 174                         "fi\0"                                          \
 175         "boot_flash="                                                   \
 176                         "cp.b 0x1c0000 0xa0800000 0x500000; "           \
 177                         "bootm 0x40000\0"                               \
 178
 179 #define CONFIG_SETUP_MEMORY_TAGS 1
 180 #define CONFIG_CMDLINE_TAG       1      /* enable passing of ATAGs      */
 181 /* #define CONFIG_INITRD_TAG     1 */
 182
 183 #if defined(CONFIG_CMD_KGDB)
 184 #define CONFIG_KGDB_BAUDRATE    230400          /* speed to run kgdb serial port */
 185 #define CONFIG_KGDB_SER_INDEX   2               /* which serial port to use */
 186 #endif
 187
 188 /*
 189  * Miscellaneous configurable options
 190  */
 191 #define CFG_HUSH_PARSER         1
 192 #define CFG_PROMPT_HUSH_PS2     "> "
 193
 194 #define CFG_LONGHELP                            /* undef to save memory         */
 195 #ifdef CFG_HUSH_PARSER
 196 #define CFG_PROMPT              "$ "            /* Monitor Command Prompt */
 197 #else
 198 #define CFG_PROMPT              "=> "           /* Monitor Command Prompt */
 199 #endif
 200 #define CFG_CBSIZE              256             /* Console I/O Buffer Size      */
 201 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
 202 #define CFG_MAXARGS             16              /* max number of command args   */
 203 #define CFG_BARGSIZE            CFG_CBSIZE      /* Boot Argument Buffer Size    */
 204 #define CFG_DEVICE_NULLDEV      1
 205
 206 #define CFG_MEMTEST_START       0xa0400000      /* memtest works on     */
 207 #define CFG_MEMTEST_END         0xa0800000      /* 4 ... 8 MB in DRAM   */
 208
 209 #undef  CFG_CLKS_IN_HZ          /* everything, incl board info, in Hz */
 210
 211 #define CFG_LOAD_ADDR           0xa1000000      /* default load address */
 212
 213 #define CFG_HZ                  3686400         /* incrementer freq: 3.6864 MHz */
 214 #define CFG_CPUSPEED            0x207           /* need to look more closely, I think this is Turbo = 2x, L=91Mhz */
 215
 216                                                 /* valid baudrates */
 217 #define CFG_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200 }
 218
 219 #define CFG_MMC_BASE            0xF0000000
 220
 221 /*
 222  * Stack sizes
 223  *
 224  * The stack sizes are set up in start.S using the settings below
 225  */
 226 #define CONFIG_STACKSIZE        (128*1024)      /* regular stack */
 227 #ifdef CONFIG_USE_IRQ
 228 #define CONFIG_STACKSIZE_IRQ    (4*1024)        /* IRQ stack */
 229 #define CONFIG_STACKSIZE_FIQ    (4*1024)        /* FIQ stack */
 230 #endif
 231
 232 /*
 233  * Physical Memory Map
 234  */
 235 #define CONFIG_NR_DRAM_BANKS    4          /* we have 2 banks of DRAM */
 236 #define PHYS_SDRAM_1            0xa0000000 /* SDRAM Bank #1 */
 237 #define PHYS_SDRAM_1_SIZE       0x04000000 /* 64 MB */
 238 #define PHYS_SDRAM_2            0xa4000000 /* SDRAM Bank #2 */
 239 #define PHYS_SDRAM_2_SIZE       0x00000000 /* 0 MB */
 240 #define PHYS_SDRAM_3            0xa8000000 /* SDRAM Bank #3 */
 241 #define PHYS_SDRAM_3_SIZE       0x00000000 /* 0 MB */
 242 #define PHYS_SDRAM_4            0xac000000 /* SDRAM Bank #4 */
 243 #define PHYS_SDRAM_4_SIZE       0x00000000 /* 0 MB */
 244
 245 #define PHYS_FLASH_1            0x00000000 /* Flash Bank #1 */
 246
 247 #define CFG_DRAM_BASE           0xa0000000
 248 #define CFG_DRAM_SIZE           0x04000000
 249
 250 #define CFG_FLASH_BASE          PHYS_FLASH_1
 251
 252 /*
 253  * GPIO settings
 254  */
 255
 256 #define CFG_GPSR0_VAL           0x00018004
 257 #define CFG_GPSR1_VAL           0x004F0080
 258 #define CFG_GPSR2_VAL           0x13EFC000
 259 #define CFG_GPSR3_VAL           0x0006E032
 260 #define CFG_GPCR0_VAL           0x084AFE1A
 261 #define CFG_GPCR1_VAL           0x003003F2
 262 #define CFG_GPCR2_VAL           0x0C014000
 263 #define CFG_GPCR3_VAL           0x00000C00
 264 #define CFG_GPDR0_VAL           0xCBC3BFFC
 265 #define CFG_GPDR1_VAL           0x00FFABF3
 266 #define CFG_GPDR2_VAL           0x1EEFFC00
 267 #define CFG_GPDR3_VAL           0x0187EC32
 268 #define CFG_GAFR0_L_VAL         0x84400000
 269 #define CFG_GAFR0_U_VAL         0xA51A8010
 270 #define CFG_GAFR1_L_VAL         0x699A955A
 271 #define CFG_GAFR1_U_VAL         0x0005A0AA
 272 #define CFG_GAFR2_L_VAL         0x40000000
 273 #define CFG_GAFR2_U_VAL         0x0109A400
 274 #define CFG_GAFR3_L_VAL         0x54000000
 275 #define CFG_GAFR3_U_VAL         0x00001409
 276
 277 #define CFG_PSSR_VAL            0x20
 278
 279 /*
 280  * Clock settings
 281  */
 282 #define CFG_CKEN                0x00400200
 283 #define CFG_CCCR                0x02000290 /*   520Mhz */
 284 /* #define CFG_CCCR             0x02000210  416 Mhz */
 285
 286 /*
 287  * Memory settings
 288  */
 289
 290 #define CFG_MSC0_VAL            0x23F2B3DB
 291 #define CFG_MSC1_VAL            0x0000CCD1
 292 #define CFG_MSC2_VAL            0x0000B884
 293 #define CFG_MDCNFG_VAL          0x08000AC8
 294 #define CFG_MDREFR_VAL          0x0000001E
 295 #define CFG_MDMRS_VAL           0x00000000
 296
 297 #define CFG_FLYCNFG_VAL         0x00010001
 298 #define CFG_SXCNFG_VAL          0x40044004
 299
 300 /*
 301  * PCMCIA and CF Interfaces
 302  */
 303 #define CFG_MECR_VAL            0x00000002
 304 #define CFG_MCMEM0_VAL          0x00004204
 305 #define CFG_MCMEM1_VAL          0x00000000
 306 #define CFG_MCATT0_VAL          0x00010504
 307 #define CFG_MCATT1_VAL          0x00000000
 308 #define CFG_MCIO0_VAL           0x00008407
 309 #define CFG_MCIO1_VAL           0x00000000
 310
 311 #define CONFIG_PXA_PCMCIA 1
 312 #define CONFIG_PXA_IDE 1
 313
 314 #define CONFIG_PCMCIA_SLOT_A 1
 315 /* just to keep build system happy  */
 316
 317 #define CFG_PCMCIA_MEM_ADDR     0x28000000
 318 #define CFG_PCMCIA_MEM_SIZE     0x04000000
 319
 320
 321 #define CFG_IDE_MAXBUS          1
 322 /* max. 1 IDE bus               */
 323 #define CFG_IDE_MAXDEVICE       1
 324 /* max. 1 drive per IDE bus     */
 325
 326 #define CFG_ATA_IDE0_OFFSET     0x0000
 327
 328 #define CFG_ATA_BASE_ADDR       0x20000000
 329
 330 /* Offset for data I/O                  */
 331 #define CFG_ATA_DATA_OFFSET     0x1f0
 332
 333 /* Offset for normal register accesses  */
 334 #define CFG_ATA_REG_OFFSET      0x1f0
 335
 336 /* Offset for alternate registers       */
 337 #define CFG_ATA_ALT_OFFSET      0x3f0
 338
 339 /*
 340  * FLASH and environment organization
 341  */
 342
 343 #define CFG_FLASH_CFI
 344 #define CFG_FLASH_CFI_DRIVER    1
 345
 346 #define CFG_MONITOR_BASE        0
 347 #define CFG_MONITOR_LEN         0x20000
 348
 349 #define CFG_MAX_FLASH_BANKS     1       /* max number of memory banks           */
 350 #define CFG_MAX_FLASH_SECT      4 + 255  /* max number of sectors on one chip    */
 351
 352 /* timeout values are in ticks */
 353 #define CFG_FLASH_ERASE_TOUT    (25*CFG_HZ) /* Timeout for Flash Erase */
 354 #define CFG_FLASH_WRITE_TOUT    (25*CFG_HZ) /* Timeout for Flash Write */
 355
 356 /* write flash less slowly */
 357 #define CFG_FLASH_USE_BUFFER_WRITE 1
 358
 359 /* Flash environment locations */
 360 #define CFG_ENV_IS_IN_FLASH     1
 361 #define CFG_ENV_ADDR            (PHYS_FLASH_1 + CFG_MONITOR_LEN)        /* Addr of Environment Sector   */
 362 #define CFG_ENV_SIZE            0x20000 /* Total Size of Environment    */
 363 #define CFG_ENV_SECT_SIZE       0x20000 /* Total Size of Environment Sector     */
 364
 365 #endif  /* __CONFIG_H */