3 * Michael Schwingen, michael@schwingen.org
5 * Configuration settings for the AcTux-3 board.
7 * SPDX-License-Identifier: GPL-2.0+
13 #define CONFIG_IXP425 1
14 #define CONFIG_ACTUX3 1
16 #define CONFIG_MACH_TYPE 1481
18 #define CONFIG_DISPLAY_CPUINFO 1
19 #define CONFIG_DISPLAY_BOARDINFO 1
21 #define CONFIG_IXP_SERIAL
22 #define CONFIG_SYS_IXP425_CONSOLE IXP425_UART2
23 #define CONFIG_BAUDRATE 115200
24 #define CONFIG_BOOTDELAY 3
25 #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
26 #define CONFIG_BOARD_EARLY_INIT_F 1
27 #define CONFIG_SYS_LDSCRIPT "board/actux3/u-boot.lds"
29 /***************************************************************
30 * U-boot generic defines start here.
31 ***************************************************************/
32 /* Size of malloc() pool */
33 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
35 /* allow to overwrite serial and ethaddr */
36 #define CONFIG_ENV_OVERWRITE
38 /* Command line configuration. */
39 #include <config_cmd_default.h>
41 #define CONFIG_CMD_ELF
43 #define CONFIG_BOOTCOMMAND "run boot_flash"
44 /* enable passing of ATAGs */
45 #define CONFIG_CMDLINE_TAG 1
46 #define CONFIG_SETUP_MEMORY_TAGS 1
47 #define CONFIG_INITRD_TAG 1
48 #define CONFIG_REVISION_TAG 1
50 #if defined(CONFIG_CMD_KGDB)
51 # define CONFIG_KGDB_BAUDRATE 230400
54 /* Miscellaneous configurable options */
55 #define CONFIG_SYS_LONGHELP
56 /* Console I/O Buffer Size */
57 #define CONFIG_SYS_CBSIZE 256
58 /* Print Buffer Size */
59 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
60 /* max number of command args */
61 #define CONFIG_SYS_MAXARGS 16
62 /* Boot Argument Buffer Size */
63 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
65 #define CONFIG_SYS_MEMTEST_START 0x00400000
66 #define CONFIG_SYS_MEMTEST_END 0x00800000
68 /* timer clock - 2* OSC_IN system clock */
69 #define CONFIG_IXP425_TIMER_CLK 66666666
71 /* default load address */
72 #define CONFIG_SYS_LOAD_ADDR 0x00010000
75 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
77 #define CONFIG_SERIAL_RTS_ACTIVE 1
79 /* Expansion bus settings */
80 #define CONFIG_SYS_EXP_CS0 0xbd113442
83 #define CONFIG_NR_DRAM_BANKS 1
84 #define PHYS_SDRAM_1 0x00000000
85 #define CONFIG_SYS_SDRAM_BASE 0x00000000
88 #define CONFIG_SYS_SDR_CONFIG 0x3A
89 #define PHYS_SDRAM_1_SIZE 0x01000000
90 #define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a
91 #define CONFIG_SYS_SDR_MODE_CONFIG 0x1
92 #define CONFIG_SYS_DRAM_SIZE 0x01000000
94 /* FLASH organization */
95 #define CONFIG_SYS_TEXT_BASE 0x50000000
96 #define CONFIG_SYS_MAX_FLASH_BANKS 1
97 /* max number of sectors on one chip */
98 #define CONFIG_SYS_MAX_FLASH_SECT 140
99 #define PHYS_FLASH_1 0x50000000
100 #define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1 }
102 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
103 #define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
104 #define CONFIG_SYS_MONITOR_LEN (256 << 10)
105 #define CONFIG_BOARD_SIZE_LIMIT 262144
107 /* Use common CFI driver */
108 #define CONFIG_SYS_FLASH_CFI
109 #define CONFIG_FLASH_CFI_DRIVER
110 /* no byte writes on IXP4xx */
111 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
113 /* print 'E' for empty sector on flinfo */
114 #define CONFIG_SYS_FLASH_EMPTY_INFO
118 /* include IXP4xx NPE support */
119 #define CONFIG_IXP4XX_NPE 1
121 /* NPE0 PHY address */
122 #define CONFIG_PHY_ADDR 0x10
123 /* MII PHY management */
125 /* fixed-speed switch without standard PHY registers on MII */
126 #define CONFIG_MII_NPE0_FIXEDLINK 1
127 #define CONFIG_MII_NPE0_SPEED 100
128 #define CONFIG_MII_NPE0_FULLDUPLEX 1
130 /* Number of ethernet rx buffers & descriptors */
131 #define CONFIG_SYS_RX_ETH_BUFFER 16
132 #define CONFIG_RESET_PHY_R 1
133 /* ethernet switch connected to MII port */
134 #define CONFIG_MII_ETHSWITCH 1
136 #define CONFIG_CMD_DHCP
137 #define CONFIG_CMD_NET
138 #define CONFIG_CMD_MII
139 #define CONFIG_CMD_PING
140 #undef CONFIG_CMD_NFS
143 #define CONFIG_BOOTP_BOOTFILESIZE
144 #define CONFIG_BOOTP_BOOTPATH
145 #define CONFIG_BOOTP_GATEWAY
146 #define CONFIG_BOOTP_HOSTNAME
148 /* Cache Configuration */
149 #define CONFIG_SYS_CACHELINE_SIZE 32
152 * environment organization:
153 * one flash sector, embedded in uboot area (bottom bootblock flash)
155 #define CONFIG_ENV_IS_IN_FLASH 1
156 #define CONFIG_ENV_SIZE 0x2000
157 #define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x4000)
158 #define CONFIG_SYS_USE_PPCENV 1
160 #define CONFIG_EXTRA_ENV_SETTINGS \
161 "npe_ucode=50040000\0" \
162 "mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \
163 "kerneladdr=50050000\0" \
164 "kernelfile=actux3/uImage\0" \
165 "rootfile=actux3/rootfs\0" \
166 "rootaddr=50170000\0" \
168 "updateboot_ser=mw.b 10000 ff 40000;" \
169 " loady ${loadaddr};" \
170 " run eraseboot writeboot\0" \
171 "updateboot_net=mw.b 10000 ff 40000;" \
172 " tftp ${loadaddr} actux3/u-boot.bin;" \
173 " run eraseboot writeboot\0" \
174 "eraseboot=protect off 50000000 50003fff;" \
175 " protect off 50006000 5003ffff;" \
176 " erase 50000000 50003fff;" \
177 " erase 50006000 5003ffff\0" \
178 "writeboot=cp.b 10000 50000000 4000;" \
179 " cp.b 16000 50006000 3a000\0" \
180 "updateucode=loady;" \
181 " era ${npe_ucode} +${filesize};" \
182 " cp.b ${loadaddr} ${npe_ucode} ${filesize}\0" \
183 "updateroot=tftp ${loadaddr} ${rootfile};" \
184 " era ${rootaddr} +${filesize};" \
185 " cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \
186 "updatekern=tftp ${loadaddr} ${kernelfile};" \
187 " era ${kerneladdr} +${filesize};" \
188 " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0" \
189 "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
190 " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
191 "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
192 " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
193 "addtty=setenv bootargs ${bootargs} console=ttyS1,${baudrate}\0" \
194 "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \
195 "boot_flash=run flashargs addtty addeth;" \
196 " bootm ${kerneladdr}\0" \
197 "boot_net=run netargs addtty addeth;" \
198 " tftpboot ${loadaddr} ${kernelfile};" \
201 /* additions for new relocation code, must be added to all boards */
202 #define CONFIG_SYS_INIT_SP_ADDR \
203 (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
205 #endif /* __CONFIG_H */