3 * Michael Schwingen, michael@schwingen.org
5 * Configuration settings for the AcTux-1 board.
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 /* 1: modified board with 32MB DRAM */
30 #define CONFIG_ACTUX1_32MB 0
31 /* 1: 2*2MB FLASH (standard) */
32 #define CONFIG_ACTUX1_FLASH2X2 1
33 /* 1: 1*8MB FLASH (upgraded boards) */
34 #define CONFIG_ACTUX1_FLASH1X8 0
36 #define CONFIG_IXP425 1
37 #define CONFIG_ACTUX1 1
39 #define CONFIG_DISPLAY_CPUINFO 1
40 #define CONFIG_DISPLAY_BOARDINFO 1
42 #define CONFIG_IXP_SERIAL
43 #define CONFIG_SYS_IXP425_CONSOLE IXP425_UART2
44 #define CONFIG_BAUDRATE 115200
45 #define CONFIG_BOOTDELAY 3
46 #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
48 /***************************************************************
49 * U-boot generic defines start here.
50 ***************************************************************/
54 * Size of malloc() pool
56 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
57 /* size in bytes reserved for initial data */
58 #define CONFIG_SYS_GBL_DATA_SIZE 128
60 /* allow to overwrite serial and ethaddr */
61 #define CONFIG_ENV_OVERWRITE
63 /* Command line configuration. */
64 #include <config_cmd_default.h>
66 #define CONFIG_CMD_ELF
70 #define CONFIG_BOOTCOMMAND "run boot_flash"
71 /* enable passing of ATAGs */
72 #define CONFIG_CMDLINE_TAG 1
73 #define CONFIG_SETUP_MEMORY_TAGS 1
74 #define CONFIG_INITRD_TAG 1
75 #define CONFIG_REVISION_TAG 1
77 #if defined(CONFIG_CMD_KGDB)
78 # define CONFIG_KGDB_BAUDRATE 230400
79 /* which serial port to use */
80 # define CONFIG_KGDB_SER_INDEX 1
83 /* Miscellaneous configurable options */
84 #define CONFIG_SYS_LONGHELP
85 #define CONFIG_SYS_PROMPT "=> "
86 /* Console I/O Buffer Size */
87 #define CONFIG_SYS_CBSIZE 256
88 /* Print Buffer Size */
89 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
90 /* max number of command args */
91 #define CONFIG_SYS_MAXARGS 16
92 /* Boot Argument Buffer Size */
93 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
95 #define CONFIG_SYS_MEMTEST_START 0x00400000
96 #define CONFIG_SYS_MEMTEST_END 0x00800000
98 /* everything, incl board info, in Hz */
99 #undef CONFIG_SYS_CLKS_IN_HZ
100 /* spec says 66.666 MHz, but it appears to be 33 */
101 #define CONFIG_SYS_HZ 3333333
103 /* default load address */
104 #define CONFIG_SYS_LOAD_ADDR 0x00010000
106 /* valid baudrates */
107 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
109 #define CONFIG_SERIAL_RTS_ACTIVE 1
113 * The stack sizes are set up in start.S using the settings below
115 #define CONFIG_STACKSIZE (128*1024) /* regular stack */
116 #ifdef CONFIG_USE_IRQ
117 # define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
118 # define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
121 /* Expansion bus settings */
122 #define CONFIG_SYS_EXP_CS0 0xbd113842
125 #define CONFIG_NR_DRAM_BANKS 1
126 #define PHYS_SDRAM_1 0x00000000
127 #define CONFIG_SYS_DRAM_BASE 0x00000000
129 #if CONFIG_ACTUX1_32MB
130 # define CONFIG_SYS_SDR_CONFIG 0x18
131 # define PHYS_SDRAM_1_SIZE 0x02000000
132 # define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a
133 # define CONFIG_SYS_SDR_MODE_CONFIG 0x1
134 # define CONFIG_SYS_DRAM_SIZE 0x02000000
135 #else /* 16MB SDRAM */
136 # define CONFIG_SYS_SDR_CONFIG 0x3A
137 # define PHYS_SDRAM_1_SIZE 0x01000000
138 # define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a
139 # define CONFIG_SYS_SDR_MODE_CONFIG 0x1
140 # define CONFIG_SYS_DRAM_SIZE 0x01000000
143 /* FLASH organization */
144 #if CONFIG_ACTUX1_FLASH2X2
145 # define CONFIG_SYS_MAX_FLASH_BANKS 2
146 /* max number of sectors on one chip */
147 # define CONFIG_SYS_MAX_FLASH_SECT 40
148 # define PHYS_FLASH_1 0x50000000
149 # define PHYS_FLASH_2 0x50200000
150 # define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 }
152 #if CONFIG_ACTUX1_FLASH1X8
153 # define CONFIG_SYS_MAX_FLASH_BANKS 1
154 /* max number of sectors on one chip */
155 # define CONFIG_SYS_MAX_FLASH_SECT 140
156 # define PHYS_FLASH_1 0x50000000
157 # define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1 }
160 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
161 #define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
162 #define CONFIG_SYS_MONITOR_LEN (256 << 10)
164 /* Use common CFI driver */
165 #define CONFIG_SYS_FLASH_CFI
166 #define CONFIG_FLASH_CFI_DRIVER
167 /* no byte writes on IXP4xx */
168 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
169 /* print 'E' for empty sector on flinfo */
170 #define CONFIG_SYS_FLASH_EMPTY_INFO
174 /* include IXP4xx NPE support */
175 #define CONFIG_IXP4XX_NPE 1
176 #define CONFIG_NET_MULTI 1
177 /* NPE0 PHY address */
178 #define CONFIG_PHY_ADDR 0
179 /* MII PHY management */
181 /* Number of ethernet rx buffers & descriptors */
182 #define CONFIG_SYS_RX_ETH_BUFFER 16
183 #define CONFIG_RESET_PHY_R 1
185 #define CONFIG_CMD_DHCP
186 #define CONFIG_CMD_NET
187 #define CONFIG_CMD_MII
188 #define CONFIG_CMD_PING
189 #undef CONFIG_CMD_NFS
192 #define CONFIG_BOOTP_BOOTFILESIZE
193 #define CONFIG_BOOTP_BOOTPATH
194 #define CONFIG_BOOTP_GATEWAY
195 #define CONFIG_BOOTP_HOSTNAME
197 /* Cache Configuration */
198 #define CONFIG_SYS_CACHELINE_SIZE 32
201 * environment organization:
202 * one flash sector, embedded in uboot area (bottom bootblock flash)
204 #define CONFIG_ENV_IS_IN_FLASH 1
205 #define CONFIG_ENV_SIZE 0x2000
206 #define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x4000)
207 #define CONFIG_SYS_USE_PPCENV 1
209 #define CONFIG_EXTRA_ENV_SETTINGS \
210 "npe_ucode=50040000\0" \
211 "mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \
212 "kerneladdr=50050000\0" \
213 "rootaddr=50170000\0" \
215 "updateboot_ser=mw.b 10000 ff 40000;" \
216 " loady ${loadaddr};" \
217 " run eraseboot writeboot\0" \
218 "updateboot_net=mw.b 10000 ff 40000;" \
219 " tftp ${loadaddr} u-boot.bin;" \
220 " run eraseboot writeboot\0" \
221 "eraseboot=protect off 50000000 50003fff;" \
222 " protect off 50006000 5003ffff;" \
223 " erase 50000000 50003fff;" \
224 " erase 50006000 5003ffff\0" \
225 "writeboot=cp.b 10000 50000000 4000;" \
226 " cp.b 16000 50006000 3a000\0" \
227 "eraseenv=protect off 50004000 50005fff;" \
228 " erase 50004000 50005fff\0" \
229 "updateroot=tftp ${loadaddr} ${rootfile};" \
230 " era ${rootaddr} +${filesize};" \
231 " cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \
232 "updatekern=tftp ${loadaddr} ${kernelfile};" \
233 " era ${kerneladdr} +${filesize};" \
234 " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0" \
235 "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
236 " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
237 "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
238 " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
239 "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \
240 "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \
241 "boot_flash=run flashargs addtty addeth;" \
242 " bootm ${kerneladdr}\0" \
243 "boot_net=run netargs addtty addeth;" \
244 " tftpboot ${loadaddr} ${kernelfile};" \
247 #endif /* __CONFIG_H */