3 * Michael Schwingen, michael@schwingen.org
5 * Configuration settings for the AcTux-1 board.
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 #define CONFIG_IXP425 1
30 #define CONFIG_ACTUX1 1
32 #define CONFIG_DISPLAY_CPUINFO 1
33 #define CONFIG_DISPLAY_BOARDINFO 1
35 #define CONFIG_IXP_SERIAL
36 #define CONFIG_SYS_IXP425_CONSOLE IXP425_UART2
37 #define CONFIG_BAUDRATE 115200
38 #define CONFIG_BOOTDELAY 3
39 #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
40 #define CONFIG_BOARD_EARLY_INIT_F 1
41 #define CONFIG_SYS_LDSCRIPT "board/actux1/u-boot.lds"
43 /***************************************************************
44 * U-boot generic defines start here.
45 ***************************************************************/
47 * Size of malloc() pool
49 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
51 /* allow to overwrite serial and ethaddr */
52 #define CONFIG_ENV_OVERWRITE
54 /* Command line configuration. */
55 #include <config_cmd_default.h>
57 #define CONFIG_CMD_ELF
59 #define CONFIG_CMD_PCI
60 #define CONFIG_PCI_PNP
61 #define CONFIG_IXP_PCI
62 #define CONFIG_PCI_SCAN_SHOW
63 #define CONFIG_CMD_PCI_ENUM
66 #define CONFIG_BOOTCOMMAND "run boot_flash"
67 /* enable passing of ATAGs */
68 #define CONFIG_CMDLINE_TAG 1
69 #define CONFIG_SETUP_MEMORY_TAGS 1
70 #define CONFIG_INITRD_TAG 1
71 #define CONFIG_REVISION_TAG 1
73 #if defined(CONFIG_CMD_KGDB)
74 # define CONFIG_KGDB_BAUDRATE 230400
75 /* which serial port to use */
76 # define CONFIG_KGDB_SER_INDEX 1
79 /* Miscellaneous configurable options */
80 #define CONFIG_SYS_LONGHELP
81 #define CONFIG_SYS_PROMPT "=> "
82 /* Console I/O Buffer Size */
83 #define CONFIG_SYS_CBSIZE 256
84 /* Print Buffer Size */
85 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
86 /* max number of command args */
87 #define CONFIG_SYS_MAXARGS 16
88 /* Boot Argument Buffer Size */
89 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
91 #define CONFIG_SYS_MEMTEST_START 0x00400000
92 #define CONFIG_SYS_MEMTEST_END 0x00800000
94 /* timer clock - 2* OSC_IN system clock */
95 #define CONFIG_IXP425_TIMER_CLK 66666666
96 #define CONFIG_SYS_HZ 1000
98 /* default load address */
99 #define CONFIG_SYS_LOAD_ADDR 0x00010000
101 /* valid baudrates */
102 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
104 #define CONFIG_SERIAL_RTS_ACTIVE 1
108 * The stack sizes are set up in start.S using the settings below
110 #define CONFIG_STACKSIZE (128*1024) /* regular stack */
112 /* Expansion bus settings */
113 #define CONFIG_SYS_EXP_CS0 0xbd113842
116 #define CONFIG_NR_DRAM_BANKS 1
117 #define PHYS_SDRAM_1 0x00000000
118 #define CONFIG_SYS_SDRAM_BASE 0x00000000
120 #ifdef CONFIG_RAM_32MB
121 # define CONFIG_SYS_SDR_CONFIG 0x18
122 # define PHYS_SDRAM_1_SIZE 0x02000000
123 # define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a
124 # define CONFIG_SYS_SDR_MODE_CONFIG 0x1
125 # define CONFIG_SYS_DRAM_SIZE 0x02000000
126 #else /* 16MB SDRAM */
127 # define CONFIG_SYS_SDR_CONFIG 0x3A
128 # define PHYS_SDRAM_1_SIZE 0x01000000
129 # define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a
130 # define CONFIG_SYS_SDR_MODE_CONFIG 0x1
131 # define CONFIG_SYS_DRAM_SIZE 0x01000000
134 /* FLASH organization */
135 #define CONFIG_SYS_TEXT_BASE 0x50000000
136 #ifdef CONFIG_FLASH2X2
137 # define CONFIG_SYS_MAX_FLASH_BANKS 2
138 /* max number of sectors on one chip */
139 # define CONFIG_SYS_MAX_FLASH_SECT 40
140 # define PHYS_FLASH_1 0x50000000
141 # define PHYS_FLASH_2 0x50200000
142 # define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 }
144 #ifdef CONFIG_FLASH1X8
145 # define CONFIG_SYS_MAX_FLASH_BANKS 1
146 /* max number of sectors on one chip */
147 # define CONFIG_SYS_MAX_FLASH_SECT 140
148 # define PHYS_FLASH_1 0x50000000
149 # define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1 }
152 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
153 #define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
154 #define CONFIG_SYS_MONITOR_LEN (256 << 10)
155 #define CONFIG_BOARD_SIZE_LIMIT 262144
157 /* Use common CFI driver */
158 #define CONFIG_SYS_FLASH_CFI
159 #define CONFIG_FLASH_CFI_DRIVER
160 /* no byte writes on IXP4xx */
161 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
162 /* print 'E' for empty sector on flinfo */
163 #define CONFIG_SYS_FLASH_EMPTY_INFO
167 /* include IXP4xx NPE support */
168 #define CONFIG_IXP4XX_NPE 1
169 #define CONFIG_NET_MULTI 1
170 /* NPE0 PHY address */
171 #define CONFIG_PHY_ADDR 0
172 /* NPE1 PHY address (HW Release E only) */
173 #define CONFIG_PHY1_ADDR 1
174 /* MII PHY management */
176 /* Number of ethernet rx buffers & descriptors */
177 #define CONFIG_SYS_RX_ETH_BUFFER 16
178 #define CONFIG_RESET_PHY_R 1
180 #define CONFIG_HAS_ETH1 1
182 #define CONFIG_CMD_DHCP
183 #define CONFIG_CMD_NET
184 #define CONFIG_CMD_MII
185 #define CONFIG_CMD_PING
186 #undef CONFIG_CMD_NFS
189 #define CONFIG_BOOTP_BOOTFILESIZE
190 #define CONFIG_BOOTP_BOOTPATH
191 #define CONFIG_BOOTP_GATEWAY
192 #define CONFIG_BOOTP_HOSTNAME
194 /* Cache Configuration */
195 #define CONFIG_SYS_CACHELINE_SIZE 32
198 * environment organization:
199 * one flash sector, embedded in uboot area (bottom bootblock flash)
201 #define CONFIG_ENV_IS_IN_FLASH 1
202 #define CONFIG_ENV_SIZE 0x2000
203 #define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x4000)
204 #define CONFIG_SYS_USE_PPCENV 1
206 #define CONFIG_EXTRA_ENV_SETTINGS \
207 "npe_ucode=50040000\0" \
208 "mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \
209 "kerneladdr=50050000\0" \
210 "kernelfile=actux1/uImage\0" \
211 "rootfile=actux1/rootfs\0" \
212 "rootaddr=50170000\0" \
214 "updateboot_ser=mw.b 10000 ff 40000;" \
215 " loady ${loadaddr};" \
216 " run eraseboot writeboot\0" \
217 "updateboot_net=mw.b 10000 ff 40000;" \
218 " tftp ${loadaddr} actux1/u-boot.bin;" \
219 " run eraseboot writeboot\0" \
220 "eraseboot=protect off 50000000 50003fff;" \
221 " protect off 50006000 5003ffff;" \
222 " erase 50000000 50003fff;" \
223 " erase 50006000 5003ffff\0" \
224 "writeboot=cp.b 10000 50000000 4000;" \
225 " cp.b 16000 50006000 3a000\0" \
226 "updateucode=loady;" \
227 " era ${npe_ucode} +${filesize};" \
228 " cp.b ${loadaddr} ${npe_ucode} ${filesize}\0" \
229 "updateroot=tftp ${loadaddr} ${rootfile};" \
230 " era ${rootaddr} +${filesize};" \
231 " cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \
232 "updatekern=tftp ${loadaddr} ${kernelfile};" \
233 " era ${kerneladdr} +${filesize};" \
234 " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0" \
235 "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
236 " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
237 "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
238 " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
239 "addtty=setenv bootargs ${bootargs} console=ttyS1,${baudrate}\0" \
240 "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \
241 "boot_flash=run flashargs addtty addeth;" \
242 " bootm ${kerneladdr}\0" \
243 "boot_net=run netargs addtty addeth;" \
244 " tftpboot ${loadaddr} ${kernelfile};" \
247 /* additions for new relocation code, must be added to all boards */
248 #define CONFIG_SYS_INIT_SP_ADDR \
249 (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
251 #endif /* __CONFIG_H */