3 * Michael Schwingen, michael@schwingen.org
5 * Configuration settings for the AcTux-1 board.
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 #define CONFIG_IXP425 1
30 #define CONFIG_ACTUX1 1
32 #define CONFIG_MACH_TYPE 1479
34 #define CONFIG_DISPLAY_CPUINFO 1
35 #define CONFIG_DISPLAY_BOARDINFO 1
37 #define CONFIG_IXP_SERIAL
38 #define CONFIG_SYS_IXP425_CONSOLE IXP425_UART2
39 #define CONFIG_BAUDRATE 115200
40 #define CONFIG_BOOTDELAY 3
41 #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
42 #define CONFIG_BOARD_EARLY_INIT_F 1
43 #define CONFIG_SYS_LDSCRIPT "board/actux1/u-boot.lds"
45 /***************************************************************
46 * U-boot generic defines start here.
47 ***************************************************************/
49 * Size of malloc() pool
51 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
53 /* allow to overwrite serial and ethaddr */
54 #define CONFIG_ENV_OVERWRITE
56 /* Command line configuration. */
57 #include <config_cmd_default.h>
59 #define CONFIG_CMD_ELF
61 #define CONFIG_CMD_PCI
62 #define CONFIG_PCI_PNP
63 #define CONFIG_IXP_PCI
64 #define CONFIG_PCI_SCAN_SHOW
65 #define CONFIG_CMD_PCI_ENUM
68 #define CONFIG_BOOTCOMMAND "run boot_flash"
69 /* enable passing of ATAGs */
70 #define CONFIG_CMDLINE_TAG 1
71 #define CONFIG_SETUP_MEMORY_TAGS 1
72 #define CONFIG_INITRD_TAG 1
73 #define CONFIG_REVISION_TAG 1
75 #if defined(CONFIG_CMD_KGDB)
76 # define CONFIG_KGDB_BAUDRATE 230400
77 /* which serial port to use */
78 # define CONFIG_KGDB_SER_INDEX 1
81 /* Miscellaneous configurable options */
82 #define CONFIG_SYS_LONGHELP
83 #define CONFIG_SYS_PROMPT "=> "
84 /* Console I/O Buffer Size */
85 #define CONFIG_SYS_CBSIZE 256
86 /* Print Buffer Size */
87 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
88 /* max number of command args */
89 #define CONFIG_SYS_MAXARGS 16
90 /* Boot Argument Buffer Size */
91 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
93 #define CONFIG_SYS_MEMTEST_START 0x00400000
94 #define CONFIG_SYS_MEMTEST_END 0x00800000
96 /* timer clock - 2* OSC_IN system clock */
97 #define CONFIG_IXP425_TIMER_CLK 66666666
98 #define CONFIG_SYS_HZ 1000
100 /* default load address */
101 #define CONFIG_SYS_LOAD_ADDR 0x00010000
103 /* valid baudrates */
104 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
106 #define CONFIG_SERIAL_RTS_ACTIVE 1
108 /* Expansion bus settings */
109 #define CONFIG_SYS_EXP_CS0 0xbd113842
112 #define CONFIG_NR_DRAM_BANKS 1
113 #define PHYS_SDRAM_1 0x00000000
114 #define CONFIG_SYS_SDRAM_BASE 0x00000000
116 #ifdef CONFIG_RAM_32MB
117 # define CONFIG_SYS_SDR_CONFIG 0x18
118 # define PHYS_SDRAM_1_SIZE 0x02000000
119 # define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a
120 # define CONFIG_SYS_SDR_MODE_CONFIG 0x1
121 # define CONFIG_SYS_DRAM_SIZE 0x02000000
122 #else /* 16MB SDRAM */
123 # define CONFIG_SYS_SDR_CONFIG 0x3A
124 # define PHYS_SDRAM_1_SIZE 0x01000000
125 # define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a
126 # define CONFIG_SYS_SDR_MODE_CONFIG 0x1
127 # define CONFIG_SYS_DRAM_SIZE 0x01000000
130 /* FLASH organization */
131 #define CONFIG_SYS_TEXT_BASE 0x50000000
132 #ifdef CONFIG_FLASH2X2
133 # define CONFIG_SYS_MAX_FLASH_BANKS 2
134 /* max number of sectors on one chip */
135 # define CONFIG_SYS_MAX_FLASH_SECT 40
136 # define PHYS_FLASH_1 0x50000000
137 # define PHYS_FLASH_2 0x50200000
138 # define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 }
140 #ifdef CONFIG_FLASH1X8
141 # define CONFIG_SYS_MAX_FLASH_BANKS 1
142 /* max number of sectors on one chip */
143 # define CONFIG_SYS_MAX_FLASH_SECT 140
144 # define PHYS_FLASH_1 0x50000000
145 # define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1 }
148 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
149 #define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
150 #define CONFIG_SYS_MONITOR_LEN (256 << 10)
151 #define CONFIG_BOARD_SIZE_LIMIT 262144
153 /* Use common CFI driver */
154 #define CONFIG_SYS_FLASH_CFI
155 #define CONFIG_FLASH_CFI_DRIVER
156 /* no byte writes on IXP4xx */
157 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
158 /* print 'E' for empty sector on flinfo */
159 #define CONFIG_SYS_FLASH_EMPTY_INFO
163 /* include IXP4xx NPE support */
164 #define CONFIG_IXP4XX_NPE 1
165 /* NPE0 PHY address */
166 #define CONFIG_PHY_ADDR 0
167 /* NPE1 PHY address (HW Release E only) */
168 #define CONFIG_PHY1_ADDR 1
169 /* MII PHY management */
171 /* Number of ethernet rx buffers & descriptors */
172 #define CONFIG_SYS_RX_ETH_BUFFER 16
173 #define CONFIG_RESET_PHY_R 1
175 #define CONFIG_HAS_ETH1 1
177 #define CONFIG_CMD_DHCP
178 #define CONFIG_CMD_NET
179 #define CONFIG_CMD_MII
180 #define CONFIG_CMD_PING
181 #undef CONFIG_CMD_NFS
184 #define CONFIG_BOOTP_BOOTFILESIZE
185 #define CONFIG_BOOTP_BOOTPATH
186 #define CONFIG_BOOTP_GATEWAY
187 #define CONFIG_BOOTP_HOSTNAME
189 /* Cache Configuration */
190 #define CONFIG_SYS_CACHELINE_SIZE 32
193 * environment organization:
194 * one flash sector, embedded in uboot area (bottom bootblock flash)
196 #define CONFIG_ENV_IS_IN_FLASH 1
197 #define CONFIG_ENV_SIZE 0x2000
198 #define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x4000)
199 #define CONFIG_SYS_USE_PPCENV 1
201 #define CONFIG_EXTRA_ENV_SETTINGS \
202 "npe_ucode=50040000\0" \
203 "mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \
204 "kerneladdr=50050000\0" \
205 "kernelfile=actux1/uImage\0" \
206 "rootfile=actux1/rootfs\0" \
207 "rootaddr=50170000\0" \
209 "updateboot_ser=mw.b 10000 ff 40000;" \
210 " loady ${loadaddr};" \
211 " run eraseboot writeboot\0" \
212 "updateboot_net=mw.b 10000 ff 40000;" \
213 " tftp ${loadaddr} actux1/u-boot.bin;" \
214 " run eraseboot writeboot\0" \
215 "eraseboot=protect off 50000000 50003fff;" \
216 " protect off 50006000 5003ffff;" \
217 " erase 50000000 50003fff;" \
218 " erase 50006000 5003ffff\0" \
219 "writeboot=cp.b 10000 50000000 4000;" \
220 " cp.b 16000 50006000 3a000\0" \
221 "updateucode=loady;" \
222 " era ${npe_ucode} +${filesize};" \
223 " cp.b ${loadaddr} ${npe_ucode} ${filesize}\0" \
224 "updateroot=tftp ${loadaddr} ${rootfile};" \
225 " era ${rootaddr} +${filesize};" \
226 " cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \
227 "updatekern=tftp ${loadaddr} ${kernelfile};" \
228 " era ${kerneladdr} +${filesize};" \
229 " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0" \
230 "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
231 " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
232 "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
233 " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
234 "addtty=setenv bootargs ${bootargs} console=ttyS1,${baudrate}\0" \
235 "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \
236 "boot_flash=run flashargs addtty addeth;" \
237 " bootm ${kerneladdr}\0" \
238 "boot_net=run netargs addtty addeth;" \
239 " tftpboot ${loadaddr} ${kernelfile};" \
242 /* additions for new relocation code, must be added to all boards */
243 #define CONFIG_SYS_INIT_SP_ADDR \
244 (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
246 #endif /* __CONFIG_H */