3 * Michael Schwingen, michael@schwingen.org
5 * Configuration settings for the AcTux-1 board.
7 * SPDX-License-Identifier: GPL-2.0+
13 #define CONFIG_IXP425 1
14 #define CONFIG_ACTUX1 1
16 #define CONFIG_MACH_TYPE 1479
18 #define CONFIG_DISPLAY_CPUINFO 1
19 #define CONFIG_DISPLAY_BOARDINFO 1
21 #define CONFIG_IXP_SERIAL
22 #define CONFIG_SYS_IXP425_CONSOLE IXP425_UART2
23 #define CONFIG_BAUDRATE 115200
24 #define CONFIG_BOOTDELAY 3
25 #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
26 #define CONFIG_BOARD_EARLY_INIT_F 1
27 #define CONFIG_SYS_LDSCRIPT "board/actux1/u-boot.lds"
29 /***************************************************************
30 * U-boot generic defines start here.
31 ***************************************************************/
33 * Size of malloc() pool
35 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
37 /* allow to overwrite serial and ethaddr */
38 #define CONFIG_ENV_OVERWRITE
40 /* Command line configuration. */
41 #include <config_cmd_default.h>
43 #define CONFIG_CMD_ELF
45 #define CONFIG_CMD_PCI
46 #define CONFIG_PCI_PNP
47 #define CONFIG_IXP_PCI
48 #define CONFIG_PCI_SCAN_SHOW
49 #define CONFIG_CMD_PCI_ENUM
52 #define CONFIG_BOOTCOMMAND "run boot_flash"
53 /* enable passing of ATAGs */
54 #define CONFIG_CMDLINE_TAG 1
55 #define CONFIG_SETUP_MEMORY_TAGS 1
56 #define CONFIG_INITRD_TAG 1
57 #define CONFIG_REVISION_TAG 1
59 #if defined(CONFIG_CMD_KGDB)
60 # define CONFIG_KGDB_BAUDRATE 230400
61 /* which serial port to use */
62 # define CONFIG_KGDB_SER_INDEX 1
65 /* Miscellaneous configurable options */
66 #define CONFIG_SYS_LONGHELP
67 /* Console I/O Buffer Size */
68 #define CONFIG_SYS_CBSIZE 256
69 /* Print Buffer Size */
70 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
71 /* max number of command args */
72 #define CONFIG_SYS_MAXARGS 16
73 /* Boot Argument Buffer Size */
74 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
76 #define CONFIG_SYS_MEMTEST_START 0x00400000
77 #define CONFIG_SYS_MEMTEST_END 0x00800000
79 /* timer clock - 2* OSC_IN system clock */
80 #define CONFIG_IXP425_TIMER_CLK 66666666
82 /* default load address */
83 #define CONFIG_SYS_LOAD_ADDR 0x00010000
86 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
88 #define CONFIG_SERIAL_RTS_ACTIVE 1
90 /* Expansion bus settings */
91 #define CONFIG_SYS_EXP_CS0 0xbd113842
94 #define CONFIG_NR_DRAM_BANKS 1
95 #define PHYS_SDRAM_1 0x00000000
96 #define CONFIG_SYS_SDRAM_BASE 0x00000000
98 #ifdef CONFIG_RAM_32MB
99 # define CONFIG_SYS_SDR_CONFIG 0x18
100 # define PHYS_SDRAM_1_SIZE 0x02000000
101 # define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a
102 # define CONFIG_SYS_SDR_MODE_CONFIG 0x1
103 # define CONFIG_SYS_DRAM_SIZE 0x02000000
104 #else /* 16MB SDRAM */
105 # define CONFIG_SYS_SDR_CONFIG 0x3A
106 # define PHYS_SDRAM_1_SIZE 0x01000000
107 # define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a
108 # define CONFIG_SYS_SDR_MODE_CONFIG 0x1
109 # define CONFIG_SYS_DRAM_SIZE 0x01000000
112 /* FLASH organization */
113 #define CONFIG_SYS_TEXT_BASE 0x50000000
114 #ifdef CONFIG_FLASH2X2
115 # define CONFIG_SYS_MAX_FLASH_BANKS 2
116 /* max number of sectors on one chip */
117 # define CONFIG_SYS_MAX_FLASH_SECT 40
118 # define PHYS_FLASH_1 0x50000000
119 # define PHYS_FLASH_2 0x50200000
120 # define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 }
122 #ifdef CONFIG_FLASH1X8
123 # define CONFIG_SYS_MAX_FLASH_BANKS 1
124 /* max number of sectors on one chip */
125 # define CONFIG_SYS_MAX_FLASH_SECT 140
126 # define PHYS_FLASH_1 0x50000000
127 # define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1 }
130 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
131 #define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
132 #define CONFIG_SYS_MONITOR_LEN (256 << 10)
133 #define CONFIG_BOARD_SIZE_LIMIT 262144
135 /* Use common CFI driver */
136 #define CONFIG_SYS_FLASH_CFI
137 #define CONFIG_FLASH_CFI_DRIVER
138 /* no byte writes on IXP4xx */
139 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
140 /* print 'E' for empty sector on flinfo */
141 #define CONFIG_SYS_FLASH_EMPTY_INFO
145 /* include IXP4xx NPE support */
146 #define CONFIG_IXP4XX_NPE 1
147 /* NPE0 PHY address */
148 #define CONFIG_PHY_ADDR 0
149 /* NPE1 PHY address (HW Release E only) */
150 #define CONFIG_PHY1_ADDR 1
151 /* MII PHY management */
153 /* Number of ethernet rx buffers & descriptors */
154 #define CONFIG_SYS_RX_ETH_BUFFER 16
155 #define CONFIG_RESET_PHY_R 1
157 #define CONFIG_HAS_ETH1 1
159 #define CONFIG_CMD_DHCP
160 #define CONFIG_CMD_NET
161 #define CONFIG_CMD_MII
162 #define CONFIG_CMD_PING
163 #undef CONFIG_CMD_NFS
166 #define CONFIG_BOOTP_BOOTFILESIZE
167 #define CONFIG_BOOTP_BOOTPATH
168 #define CONFIG_BOOTP_GATEWAY
169 #define CONFIG_BOOTP_HOSTNAME
171 /* Cache Configuration */
172 #define CONFIG_SYS_CACHELINE_SIZE 32
175 * environment organization:
176 * one flash sector, embedded in uboot area (bottom bootblock flash)
178 #define CONFIG_ENV_IS_IN_FLASH 1
179 #define CONFIG_ENV_SIZE 0x2000
180 #define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x4000)
181 #define CONFIG_SYS_USE_PPCENV 1
183 #define CONFIG_EXTRA_ENV_SETTINGS \
184 "npe_ucode=50040000\0" \
185 "mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \
186 "kerneladdr=50050000\0" \
187 "kernelfile=actux1/uImage\0" \
188 "rootfile=actux1/rootfs\0" \
189 "rootaddr=50170000\0" \
191 "updateboot_ser=mw.b 10000 ff 40000;" \
192 " loady ${loadaddr};" \
193 " run eraseboot writeboot\0" \
194 "updateboot_net=mw.b 10000 ff 40000;" \
195 " tftp ${loadaddr} actux1/u-boot.bin;" \
196 " run eraseboot writeboot\0" \
197 "eraseboot=protect off 50000000 50003fff;" \
198 " protect off 50006000 5003ffff;" \
199 " erase 50000000 50003fff;" \
200 " erase 50006000 5003ffff\0" \
201 "writeboot=cp.b 10000 50000000 4000;" \
202 " cp.b 16000 50006000 3a000\0" \
203 "updateucode=loady;" \
204 " era ${npe_ucode} +${filesize};" \
205 " cp.b ${loadaddr} ${npe_ucode} ${filesize}\0" \
206 "updateroot=tftp ${loadaddr} ${rootfile};" \
207 " era ${rootaddr} +${filesize};" \
208 " cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \
209 "updatekern=tftp ${loadaddr} ${kernelfile};" \
210 " era ${kerneladdr} +${filesize};" \
211 " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0" \
212 "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
213 " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
214 "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
215 " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
216 "addtty=setenv bootargs ${bootargs} console=ttyS1,${baudrate}\0" \
217 "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \
218 "boot_flash=run flashargs addtty addeth;" \
219 " bootm ${kerneladdr}\0" \
220 "boot_net=run netargs addtty addeth;" \
221 " tftpboot ${loadaddr} ${kernelfile};" \
224 /* additions for new relocation code, must be added to all boards */
225 #define CONFIG_SYS_INIT_SP_ADDR \
226 (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
228 #endif /* __CONFIG_H */