mpc5200: Misc updates to a3m071 config header
[platform/kernel/u-boot.git] / include / configs / a3m071.h
1 /*
2  * Copyright 2012-2013 Stefan Roese <sr@denx.de>
3  *
4  * SPDX-License-Identifier:     GPL-2.0+
5  */
6
7 #ifndef __CONFIG_H
8 #define __CONFIG_H
9
10 /*
11  * High Level Configuration Options
12  * (easy to change)
13  */
14
15 #define CONFIG_MPC5200
16 #define CONFIG_MPC5xxx          1       /* This is an MPC5xxx CPU */
17 #define CONFIG_A3M071                   /* ... on A3M071 board */
18
19 #define CONFIG_SYS_TEXT_BASE    0x01000000      /* boot low for 32 MiB boards */
20
21 #define CONFIG_SPL_TARGET       "u-boot-img.bin"
22
23 #define CONFIG_SYS_MPC5XXX_CLKIN        33000000 /* ... running at 33MHz */
24
25 #define CONFIG_MISC_INIT_R
26 #define CONFIG_SYS_LOWBOOT              /* Enable lowboot       */
27
28 #ifdef CONFIG_A4M2K
29 #define CONFIG_HOSTNAME         a4m2k
30 #else
31 #define CONFIG_HOSTNAME         a3m071
32 #endif
33
34 #define CONFIG_BOOTCOUNT_LIMIT
35
36 /*
37  * Serial console configuration
38  */
39 #define CONFIG_PSC_CONSOLE      1           /* console is on PSC1 */
40 #define CONFIG_BAUDRATE         115200  /* ... at 115200 bps */
41 #define CONFIG_SYS_BAUDRATE_TABLE               \
42         { 9600, 19200, 38400, 57600, 115200, 230400 }
43
44 /*
45  * Command line configuration.
46  */
47 #include <config_cmd_default.h>
48
49 #define CONFIG_CMD_BSP
50 #define CONFIG_CMD_CACHE
51 #define CONFIG_CMD_MII
52 #define CONFIG_CMD_REGINFO
53 #define CONFIG_CMD_DHCP
54 #define CONFIG_BOOTP_SEND_HOSTNAME
55 #define CONFIG_BOOTP_SERVERIP
56 #define CONFIG_BOOTP_MAY_FAIL
57 #define CONFIG_BOOTP_BOOTPATH
58 #define CONFIG_BOOTP_GATEWAY
59 #define CONFIG_BOOTP_SERVERIP
60 #define CONFIG_NET_RETRY_COUNT 3
61 #define CONFIG_CMD_LINK_LOCAL
62 #define CONFIG_NETCONSOLE
63 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
64 #define CONFIG_CMD_PING
65 #define CONFIG_MTD_DEVICE       /* needed for mtdparts commands */
66 #define CONFIG_MTD_PARTITIONS   /* needed for UBI */
67 #define CONFIG_FLASH_CFI_MTD
68 #define MTDIDS_DEFAULT          "nor0=fc000000.flash"
69 #define MTDPARTS_DEFAULT        "mtdparts=fc000000.flash:512k(u-boot)," \
70                                                 "128k(env1),"   \
71                                                 "128k(env2),"   \
72                                                 "128k(hwinfo)," \
73                                                 "1M(nvramsim)," \
74                                                 "128k(dtb),"    \
75                                                 "5M(kernel),"   \
76                                                 "128k(sysinfo),"        \
77                                                 "7552k(root),"  \
78                                                 "4M(app),"      \
79                                                 "5376k(data),"  \
80                                                 "8M(install)"
81
82 #define CONFIG_LZO                      /* needed for UBI */
83 #define CONFIG_RBTREE                   /* needed for UBI */
84 #define CONFIG_CMD_MTDPARTS
85 #define CONFIG_CMD_UBI
86 #define CONFIG_CMD_UBIFS
87 #define CONFIG_FIT
88
89 /*
90  * IPB Bus clocking configuration.
91  */
92 #define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK         /* define for 133MHz speed */
93 /* define for 66MHz speed - undef for 33MHz PCI clock speed */
94 #ifdef CONFIG_A4M2K
95 #define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2
96 #else
97 #undef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2
98 #endif
99
100 /* pass open firmware flat tree */
101 #define CONFIG_OF_LIBFDT
102 #define CONFIG_OF_BOARD_SETUP
103
104 /* maximum size of the flat tree (8K) */
105 #define OF_FLAT_TREE_MAX_SIZE   8192
106
107 #define OF_CPU                  "PowerPC,5200@0"
108 #define OF_SOC                  "soc5200@f0000000"
109 #define OF_TBCLK                (bd->bi_busfreq / 4)
110 #define OF_STDOUT_PATH          "/soc5200@f0000000/serial@2000"
111
112 /*
113  * NOR flash configuration
114  */
115 #define CONFIG_SYS_FLASH_BASE           0xfc000000
116 #define CONFIG_SYS_FLASH_SIZE           0x02000000
117 #define CONFIG_ENV_ADDR                 (CONFIG_SYS_FLASH_BASE + 0x80000)
118
119 #define CONFIG_SYS_MAX_FLASH_BANKS      1
120 #define CONFIG_SYS_MAX_FLASH_SECT       256
121 #define CONFIG_SYS_FLASH_ERASE_TOUT     240000
122 #define CONFIG_SYS_FLASH_WRITE_TOUT     500
123 #define CONFIG_SYS_FLASH_LOCK_TOUT      5
124 #define CONFIG_SYS_FLASH_UNLOCK_TOUT    10000
125 #define CONFIG_SYS_FLASH_PROTECTION
126 #define CONFIG_FLASH_CFI_DRIVER
127 #define CONFIG_SYS_FLASH_CFI
128 #define CONFIG_SYS_FLASH_EMPTY_INFO
129 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
130 #define CONFIG_FLASH_VERIFY
131
132 /*
133  * Environment settings
134  */
135 #define CONFIG_ENV_IS_IN_FLASH
136 #define CONFIG_ENV_SIZE         0x10000
137 #define CONFIG_ENV_SECT_SIZE    0x20000
138 #define CONFIG_ENV_OVERWRITE
139 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
140 #define CONFIG_ENV_SIZE_REDUND  (CONFIG_ENV_SIZE)
141
142 /*
143  * Memory map
144  */
145 #define CONFIG_SYS_MBAR                 0xf0000000
146 #define CONFIG_SYS_SDRAM_BASE           0x00000000
147 #define CONFIG_SYS_DEFAULT_MBAR         0x80000000
148
149 /* Use SRAM until RAM will be available */
150 #define CONFIG_SYS_INIT_RAM_ADDR        MPC5XXX_SRAM
151 #define CONFIG_SYS_INIT_RAM_END         MPC5XXX_SRAM_SIZE
152
153 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_END - \
154                                          GENERATED_GBL_DATA_SIZE)
155 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
156
157 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_TEXT_BASE
158
159 #define CONFIG_SYS_MONITOR_LEN          (512 << 10)
160 #define CONFIG_SYS_MALLOC_LEN           (4 << 20)
161 #define CONFIG_SYS_BOOTMAPSZ            (8 << 20)
162
163 /*
164  * Ethernet configuration
165  */
166 #define CONFIG_MPC5xxx_FEC
167 #define CONFIG_MPC5xxx_FEC_MII100
168 #ifdef CONFIG_A4M2K
169 #define CONFIG_PHY_ADDR                 0x01
170 #else
171 #define CONFIG_PHY_ADDR                 0x00
172 #endif
173
174 /*
175  * GPIO configuration
176  */
177
178 /*
179  * GPIO-config depends on failsave-level
180  * failsave 0 means just MPX-config, no digiboard, no fpga
181  *          1 means digiboard ok
182  *          2 means fpga ok
183  */
184
185 #ifdef CONFIG_A4M2K
186 #define CONFIG_SYS_GPS_PORT_CONFIG      0x1005C805
187 #else
188 /* for failsave-level 0 - full failsave */
189 #define CONFIG_SYS_GPS_PORT_CONFIG      0x1005C005
190 /* for failsave-level 1 - only digiboard ok */
191 #define CONFIG_SYS_GPS_PORT_CONFIG_1    0x1005C065
192 /* for failsave-level 2 - all ok */
193 #define CONFIG_SYS_GPS_PORT_CONFIG_2    0x1005C065
194 #endif
195
196 #define CONFIG_WDOG_GPIO_PIN            GPIO_WKUP_7
197 #if defined(CONFIG_A4M2K) && !defined(CONFIG_SPL_BUILD)
198 #define CONFIG_HW_WATCHDOG              /* Use external HW-Watchdog     */
199 #endif
200
201 /*
202  * Configuration matrix
203  *                        MSB                            LSB
204  * failsave 0  0x1005C005  00010000000001011100000000000101  ( full failsave )
205  * failsave 1  0x1005C065  00010000000001011100000001100101  ( digib.-ver ok )
206  * failsave 2  0x1005C065  00010000000001011100000001100101  ( all ok )
207  *                         || ||| ||  |   ||| |   |   |   |
208  *                         || ||| ||  |   ||| |   |   |   |  bit rev name
209  *                         ++-+++-++--+---+++-+---+---+---+-  0   31 CS1
210  *                          +-+++-++--+---+++-+---+---+---+-  1   30 LPTZ
211  *                            ||| ||  |   ||| |   |   |   |   2   29 ALTs
212  *                            +++-++--+---+++-+---+---+---+-  3   28 ALTs
213  *                             ++-++--+---+++-+---+---+---+-  4   27 CS7
214  *                              +-++--+---+++-+---+---+---+-  5   26 CS6
215  *                                ||  |   ||| |   |   |   |   6   25 ATA
216  *                                ++--+---+++-+---+---+---+-  7   24 ATA
217  *                                 +--+---+++-+---+---+---+-  8   23 IR_USB_CLK
218  *                                    |   ||| |   |   |   |   9   22 IRDA
219  *                                    |   ||| |   |   |   |  10   21 IRDA
220  *                                    +---+++-+---+---+---+- 11   20 IRDA
221  *                                        ||| |   |   |   |  12   19 Ether
222  *                                        ||| |   |   |   |  13   18 Ether
223  *                                        ||| |   |   |   |  14   17 Ether
224  *                                        +++-+---+---+---+- 15   16 Ether
225  *                                         ++-+---+---+---+- 16   15 PCI_DIS
226  *                                          +-+---+---+---+- 17   14 USB_SE
227  *                                            |   |   |   |  18   13 USB
228  *                                            +---+---+---+- 19   12 USB
229  *                                                |   |   |  20   11 PSC3
230  *                                                |   |   |  21   10 PSC3
231  *                                                |   |   |  22    9 PSC3
232  *                                                +---+---+- 23    8 PSC3
233  *                                                    |   |  24    7 -
234  *                                                    |   |  25    6 PSC2
235  *                                                    |   |  26    5 PSC2
236  *                                                    +---+- 27    4 PSC2
237  *                                                        |  28    3 -
238  *                                                        |  29    2 PSC1
239  *                                                        |  30    1 PSC1
240  *                                                        +- 31    0 PSC1
241  */
242
243
244 /*
245  * Miscellaneous configurable options
246  */
247 #define CONFIG_SYS_LONGHELP
248 #define CONFIG_SYS_PROMPT               "=> "
249
250 #define CONFIG_CMDLINE_EDITING
251 #define CONFIG_SYS_HUSH_PARSER
252 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
253
254 #if defined(CONFIG_CMD_KGDB)
255 #define CONFIG_SYS_CBSIZE               1024
256 #else
257 #define CONFIG_SYS_CBSIZE               256
258 #endif
259 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
260 #define CONFIG_SYS_MAXARGS              16
261 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
262
263 #define CONFIG_SYS_MEMTEST_START        0x00100000
264 #define CONFIG_SYS_MEMTEST_END          0x00f00000
265
266 #define CONFIG_SYS_LOAD_ADDR            0x00100000
267
268 #define CONFIG_SYS_HZ                   1000
269 #define CONFIG_LOOPW
270 #define CONFIG_SYS_CONSOLE_INFO_QUIET   /* don't print console @ startup*/
271
272 /*
273  * Various low-level settings
274  */
275 #define CONFIG_SYS_HID0_INIT            (HID0_ICE | HID0_ICFI)
276 #define CONFIG_SYS_HID0_FINAL           HID0_ICE
277
278 #define CONFIG_SYS_BOOTCS_START         CONFIG_SYS_FLASH_BASE
279 #define CONFIG_SYS_BOOTCS_SIZE          CONFIG_SYS_FLASH_SIZE
280 #define CONFIG_SYS_CS0_START            CONFIG_SYS_FLASH_BASE
281 #define CONFIG_SYS_CS0_SIZE             CONFIG_SYS_FLASH_SIZE
282
283 #ifdef CONFIG_A4M2K
284 /* external MRAM */
285 #define CONFIG_SYS_CS1_START            0xf1000000
286 #define CONFIG_SYS_CS1_SIZE             (512 << 10)     /* 512KiB MRAM */
287 #endif
288
289 #define CONFIG_SYS_CS2_START            0xe0000000
290 #define CONFIG_SYS_CS2_SIZE             0x00100000
291
292 /* FPGA slave io (512kiB / 1MiB) - see ticket #66 */
293 #define CONFIG_SYS_CS3_START            0xE9000000
294 #ifdef CONFIG_A4M2K
295 #define CONFIG_SYS_CS3_SIZE             0x00100000
296 #else
297 #define CONFIG_SYS_CS3_SIZE             0x00080000
298 #endif
299 /* 00000000 00110010 1 0 1 1 10 01 00 00 0 0 0 0  = 0x0032B900 */
300 #define CONFIG_SYS_CS3_CFG              0x0032B900
301
302 #ifndef CONFIG_A4M2K
303 /* Diagnosis Interface - see ticket #63 */
304 #define CONFIG_SYS_CS4_START            0xEA000000
305 #define CONFIG_SYS_CS4_SIZE             0x00000001
306 /* 00000000 00000010 1 0 1 1 10 01 00 00 0 0 0 0  = 0x0002B900 */
307 #define CONFIG_SYS_CS4_CFG              0x0002B900
308 #endif
309
310 /* FPGA master io (64kiB / 1MiB) - see ticket #66 */
311 #define CONFIG_SYS_CS5_START            0xE8000000
312 #ifdef CONFIG_A4M2K
313 #define CONFIG_SYS_CS5_SIZE             0x00100000
314 #else
315 #define CONFIG_SYS_CS5_SIZE             0x00010000
316 #endif
317 /* 00000000 00110010 1 0 1 1 10 01 00 00 0 0 0 0  = 0x0032B900 */
318 #define CONFIG_SYS_CS5_CFG              0x0032B900
319
320 #ifdef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2     /* for pci_clk  = 66 MHz */
321 #define CONFIG_SYS_BOOTCS_CFG           0x0006F900
322 #define CONFIG_SYS_CS1_CFG              0x0008FD00
323 #define CONFIG_SYS_CS2_CFG              0x0006F90C
324 #else   /* for pci_clk = 33 MHz */
325 #define CONFIG_SYS_BOOTCS_CFG           0x0002F900
326 #define CONFIG_SYS_CS1_CFG              0x0001FB00
327 #define CONFIG_SYS_CS2_CFG              0x0002F90C
328 #endif
329
330 #define CONFIG_SYS_CS_BURST             0x00000000
331 /* set DC for FPGA CS5 and CS3 to 0 - see ticket #66 */
332 /* R  7  R  6  R  5  R  4  R  3  R  2  R  1  R  0  */
333 /* 00 11 00 11 00 00 00 11 00 00 00 00 00 00 00 00 */
334 #define CONFIG_SYS_CS_DEADCYCLE         0x33030000
335
336 #define CONFIG_SYS_RESET_ADDRESS        0xff000000
337
338 /*
339  * Environment Configuration
340  */
341
342 #define CONFIG_BOOTDELAY        3       /* -1 disables auto-boot */
343 #undef  CONFIG_BOOTARGS
344 #define CONFIG_ZERO_BOOTDELAY_CHECK
345
346 #define CONFIG_SYS_AUTOLOAD     "n"
347
348 #define CONFIG_PREBOOT  "echo;" \
349         "echo Type \"run flash_mtd\" to boot from flash with mtd filesystem;" \
350         "echo Type \"run net_nfs\" to boot from tftp with nfs filesystem;" \
351         "echo"
352
353 #undef  CONFIG_BOOTARGS
354
355 #define CONFIG_SYS_OS_BASE      0xfc200000
356 #define CONFIG_SYS_FDT_BASE     0xfc1e0000
357
358 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
359         "netdev=eth0\0"                                                 \
360         "verify=no\0"                                                   \
361         "loadaddr=200000\0"                                             \
362         "kernel_addr=" __stringify(CONFIG_SYS_OS_BASE) "\0"             \
363         "kernel_addr_r=1000000\0"                                       \
364         "fdt_addr=" __stringify(CONFIG_SYS_FDT_BASE) "\0"               \
365         "fdt_addr_r=1800000\0"                                          \
366         "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0"            \
367         "fdtfile=" __stringify(CONFIG_HOSTNAME) "/"                     \
368                 __stringify(CONFIG_HOSTNAME) ".dtb\0"                   \
369         "rootpath=/opt/eldk-5.2.1/powerpc/"                             \
370                 "core-image-minimal-mtdutils-dropbear-generic\0"        \
371         "consoledev=ttyPSC0\0"                                          \
372         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
373                 "nfsroot=${serverip}:${rootpath}\0"                     \
374         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
375         "mtdargs=setenv bootargs root=/dev/mtdblock8 "                  \
376                 "rootfstype=squashfs,jffs2\0"                           \
377         "addhost=setenv bootargs ${bootargs} "                          \
378                 "hostname=${hostname}\0"                                \
379         "addip=setenv bootargs ${bootargs} "                            \
380                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
381                 ":${hostname}:${netdev}:off panic=1\0"                  \
382         "addtty=setenv bootargs ${bootargs} "                           \
383                 "console=${consoledev},${baudrate}\0"                   \
384         "flash_nfs=run nfsargs addip addtty addmtd addhost;"            \
385                 "bootm ${kernel_addr} - ${fdt_addr}\0"                  \
386         "flash_mtd=run mtdargs addip addtty addmtd addhost;"            \
387                 "bootm ${kernel_addr} - ${fdt_addr}\0"                  \
388         "flash_self=run ramargs addip addtty addmtd addhost;"           \
389                 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0"    \
390         "net_nfs=tftp ${kernel_addr_r} ${bootfile};"                    \
391                 "tftp ${fdt_addr_r} ${fdtfile};"                        \
392                 "run nfsargs addip addtty addmtd addhost;"              \
393                 "bootm ${kernel_addr_r} - ${fdt_addr_r}\0"              \
394         "load=tftp ${loadaddr} " __stringify(CONFIG_HOSTNAME)           \
395                 "/u-boot-img.bin\0"                                     \
396         "update=protect off fc000000 fc07ffff;"                         \
397                 "era fc000000 fc07ffff;"                                \
398                 "cp.b ${loadaddr} fc000000 ${filesize}\0"               \
399         "upd=run load;run update\0"                                     \
400         "upd_fdt=tftp 1800000 a3m071/a3m071.dtb;"                       \
401                 "run mtdargs addip addtty addmtd addhost;"              \
402                 "fdt addr 1800000;fdt boardsetup;fdt chosen;"           \
403                 "erase fc1e0000 fc1fffff;cp.b 1800000 fc1e0000 20000"   \
404         "upd_kernel=tftp 1000000 a3m071/uImage-uncompressed;"           \
405                 "erase fc200000 fc6fffff;"                              \
406                 "cp.b 1000000 fc200000 ${filesize}"                     \
407         "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"              \
408         "mtdids=" MTDIDS_DEFAULT "\0"                                   \
409         "mtdparts=" MTDPARTS_DEFAULT "\0"                               \
410         ""
411
412 #define CONFIG_BOOTCOMMAND      "run flash_mtd"
413
414 /*
415  * SPL related defines
416  */
417 #define CONFIG_SPL
418 #define CONFIG_SPL_FRAMEWORK
419 #define CONFIG_SPL_BOARD_INIT
420 #define CONFIG_SPL_NOR_SUPPORT
421 #define CONFIG_SPL_TEXT_BASE    0xfc000000
422 #define CONFIG_SPL_START_S_PATH "arch/powerpc/cpu/mpc5xxx"
423 #define CONFIG_SPL_LDSCRIPT     "arch/powerpc/cpu/mpc5xxx/u-boot-spl.lds"
424 #define CONFIG_SPL_LIBCOMMON_SUPPORT    /* image.c */
425 #define CONFIG_SPL_LIBGENERIC_SUPPORT   /* string.c */
426 #define CONFIG_SPL_SERIAL_SUPPORT
427
428 /* Place BSS for SPL near end of SDRAM */
429 #define CONFIG_SPL_BSS_START_ADDR       ((128 - 1) << 20)
430 #define CONFIG_SPL_BSS_MAX_SIZE         (64 << 10)
431
432 #define CONFIG_SPL_OS_BOOT
433 #define CONFIG_SPL_ENV_SUPPORT
434 /* Place patched DT blob (fdt) at this address */
435 #define CONFIG_SYS_SPL_ARGS_ADDR        0x01800000
436
437 /* Settings for real U-Boot to be loaded from NOR flash */
438 #ifndef __ASSEMBLY__
439 extern char __spl_flash_end[];
440 #endif
441 #define CONFIG_SYS_UBOOT_BASE           __spl_flash_end
442 #define CONFIG_SYS_SPL_MAX_LEN          (32 << 10)
443 #define CONFIG_SYS_UBOOT_START          0x1000100
444
445 #endif /* __CONFIG_H */